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authorMichael Sevakis <jethead71@rockbox.org>2007-10-06 22:27:27 +0000
committerMichael Sevakis <jethead71@rockbox.org>2007-10-06 22:27:27 +0000
commit6077e5b7c85c0d6f5963e4aadb215faf2c4d10d2 (patch)
treea6bc91ee4168e83617e942eeaea46e5523e82420 /firmware/target/arm/i2s-pp.c
parentf6de0d4083a4fcb6da57f271e1f8ccaf715e571d (diff)
downloadrockbox-6077e5b7c85c0d6f5963e4aadb215faf2c4d10d2.tar.gz
rockbox-6077e5b7c85c0d6f5963e4aadb215faf2c4d10d2.zip
Unify PCM interface just above the hardware driver level for all targets including the sims. Perform lockout of audio callback when changing states. Weird new playback or recording trouble? Check before and after this revision first though things seem quite sound.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15006 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/i2s-pp.c')
-rw-r--r--firmware/target/arm/i2s-pp.c81
1 files changed, 11 insertions, 70 deletions
diff --git a/firmware/target/arm/i2s-pp.c b/firmware/target/arm/i2s-pp.c
index e06ee835a6..24d901a4c1 100644
--- a/firmware/target/arm/i2s-pp.c
+++ b/firmware/target/arm/i2s-pp.c
@@ -47,99 +47,40 @@ void i2s_reset(void)
47} 47}
48#else /* PP502X */ 48#else /* PP502X */
49 49
50/* All I2S formats send MSB first */
51
52/* Data format on the I2S bus */
53#define FORMAT_MASK (0x3 << 10)
54#define FORMAT_I2S (0x0 << 10) /* Standard I2S - leading dummy bit */
55#define FORMAT_1 (0x1 << 10)
56#define FORMAT_LJUST (0x2 << 10) /* Left justified - no dummy bit */
57#define FORMAT_3 (0x3 << 10)
58/* Other formats not yet known */
59
60/* Data size on I2S bus */
61#define SIZE_MASK (0x3 << 8)
62#define SIZE_16BIT (0x0 << 8)
63/* Other sizes not yet known */
64
65/* Data size/format on I2S FIFO */
66#define FIFO_FORMAT_MASK (0x7 << 4)
67#define FIFO_FORMAT_0 (0x0 << 4)
68/* Big-endian formats - data sent to the FIFO must be big endian.
69 * I forgot which is which size but did test them. */
70#define FIFO_FORMAT_1 (0x1 << 4)
71#define FIFO_FORMAT_2 (0x2 << 4)
72 /* 32bit-MSB-little endian */
73#define FIFO_FORMAT_LE32 (0x3 << 4)
74 /* 16bit-MSB-little endian */
75#define FIFO_FORMAT_LE16 (0x4 << 4)
76
77/* FIFO formats 0x5 and above seem equivalent to 0x4 ?? */
78
79/**
80 * PP502x
81 *
82 * IISCONFIG bits:
83 * | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
84 * | RESET | |TXFIFOEN|RXFIFOEN| | ???? | MS | ???? |
85 * | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
86 * | | | | | | | | |
87 * | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
88 * | | | | | Bus Format[1:0] | Size[1:0] |
89 * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
90 * | | Size Format[2:0] | ???? | ???? | IRQTX | IRQRX |
91 *
92 * IISFIFO_CFG bits:
93 * | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
94 * | | Free[6:0] |
95 * | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
96 * | | | | | | | | |
97 * | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
98 * | | | | RXCLR | | | | TXCLR |
99 * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
100 * | | | RX_ATN_LEVEL | | | TX_ATN_LEVEL |
101 */
102
103/* Are we I2S Master or slave? */
104#define I2S_MASTER (1<<25)
105
106#define I2S_RESET (0x1 << 31)
107
108/* 50/*
109 * Reset the I2S BIT.FORMAT I2S, 16bit, FIFO.FORMAT 32bit 51 * Reset the I2S BIT.FORMAT I2S, 16bit, FIFO.FORMAT 32bit
110 */ 52 */
111void i2s_reset(void) 53void i2s_reset(void)
112{ 54{
113 /* I2S soft reset */ 55 /* I2S soft reset */
114 IISCONFIG |= I2S_RESET; 56 IISCONFIG |= IIS_RESET;
115 IISCONFIG &= ~I2S_RESET; 57 IISCONFIG &= ~IIS_RESET;
116 58
117 /* BIT.FORMAT */ 59 /* BIT.FORMAT */
118 IISCONFIG = ((IISCONFIG & ~FORMAT_MASK) | FORMAT_I2S); 60 IISCONFIG = ((IISCONFIG & ~IIS_FORMAT_MASK) | IIS_FORMAT_IIS);
119 61
120 /* BIT.SIZE */ 62 /* BIT.SIZE */
121 IISCONFIG = ((IISCONFIG & ~SIZE_MASK) | SIZE_16BIT); 63 IISCONFIG = ((IISCONFIG & ~IIS_SIZE_MASK) | IIS_SIZE_16BIT);
122 64
123 /* FIFO.FORMAT */ 65 /* FIFO.FORMAT */
124 /* If BIT.SIZE < FIFO.FORMAT low bits will be 0 */ 66 /* If BIT.SIZE < FIFO.FORMAT low bits will be 0 */
125#ifdef HAVE_AS3514 67#ifdef HAVE_AS3514
126 /* AS3514 can only operate as I2S Slave */ 68 /* AS3514 can only operate as I2S Slave */
127 IISCONFIG |= I2S_MASTER; 69 IISCONFIG |= IIS_MASTER;
128 /* Set I2S to 44.1kHz */ 70 /* Set I2S to 44.1kHz */
129 outl((inl(0x70002808) & ~(0x1ff)) | 33, 0x70002808); 71 outl((inl(0x70002808) & ~(0x1ff)) | 33, 0x70002808);
130 outl(7, 0x60006080); 72 outl(7, 0x60006080);
131 73 IISCONFIG = ((IISCONFIG & ~IIS_FIFO_FORMAT_MASK) | IIS_FIFO_FORMAT_LE16);
132 IISCONFIG = ((IISCONFIG & ~FIFO_FORMAT_MASK) | FIFO_FORMAT_LE16);
133#else 74#else
134 IISCONFIG = ((IISCONFIG & ~FIFO_FORMAT_MASK) | FIFO_FORMAT_LE32); 75 IISCONFIG = ((IISCONFIG & ~IIS_FIFO_FORMAT_MASK) | IIS_FIFO_FORMAT_LE32);
135#endif 76#endif
136 77
137 /* RX_ATN_LVL=1 == when 12 slots full */ 78 /* RX_ATN_LVL = when 12 slots full */
138 /* TX_ATN_LVL=1 == when 12 slots empty */ 79 /* TX_ATN_LVL = when 12 slots empty */
139 IISFIFO_CFG |= 0x33; 80 IISFIFO_CFG |= IIS_RX_FULL_LVL_12 | IIS_TX_EMPTY_LVL_12;
140 81
141 /* Rx.CLR = 1, TX.CLR = 1 */ 82 /* Rx.CLR = 1, TX.CLR = 1 */
142 IISFIFO_CFG |= 0x1100; 83 IISFIFO_CFG |= IIS_RXCLR | IIS_TXCLR;
143} 84}
144 85
145#endif /* CONFIG_CPU == */ 86#endif /* CONFIG_CPU == */