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author | Greg White <gwhite@rockbox.org> | 2007-01-04 11:26:45 +0000 |
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committer | Greg White <gwhite@rockbox.org> | 2007-01-04 11:26:45 +0000 |
commit | 6c62f2f32a74c60a82024f666594b3bfd3ef8d94 (patch) | |
tree | 362d6134ee5fa925a9e6b67925272354b9ca82f7 /firmware/target/arm/gigabeat | |
parent | 85d5451f3bfa998c77696be7f08707d56c6194f0 (diff) | |
download | rockbox-6c62f2f32a74c60a82024f666594b3bfd3ef8d94.tar.gz rockbox-6c62f2f32a74c60a82024f666594b3bfd3ef8d94.zip |
Add cache control
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11902 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/gigabeat')
-rw-r--r-- | firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c b/firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c index 05b206c8ea..1e3412b2a0 100644 --- a/firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c +++ b/firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c | |||
@@ -1,5 +1,6 @@ | |||
1 | #include <string.h> | 1 | #include <string.h> |
2 | #include "s3c2440.h" | 2 | #include "s3c2440.h" |
3 | #include "mmu-meg-fx.h" | ||
3 | 4 | ||
4 | void map_memory(void); | 5 | void map_memory(void); |
5 | static void enable_mmu(void); | 6 | static void enable_mmu(void); |
@@ -82,3 +83,78 @@ static void enable_mmu(void) { | |||
82 | "mcr p15, 0, r0, c1, c0, 0" : : : "r0"); | 83 | "mcr p15, 0, r0, c1, c0, 0" : : : "r0"); |
83 | asm volatile("nop \n nop \n nop \n nop"); | 84 | asm volatile("nop \n nop \n nop \n nop"); |
84 | } | 85 | } |
86 | |||
87 | /* Invalidate DCache for this range */ | ||
88 | /* Will do write back */ | ||
89 | void invalidate_dcache_range(const void *base, unsigned int size) { | ||
90 | unsigned int addr = (int) base; | ||
91 | unsigned int end = addr+size; | ||
92 | asm volatile( | ||
93 | "bic %0, %0, #31 \n" | ||
94 | "inv_start: \n" | ||
95 | "mcr p15, 0, %0, c7, c14, 1 \n" /* Clean and invalidate this line */ | ||
96 | "add %0, %0, #32 \n" | ||
97 | "cmp %0, %1 \n" | ||
98 | "blo inv_start \n" | ||
99 | "mov %0, #0\n" | ||
100 | "mcr p15,0,%0,c7,c10,4\n" /* Drain write buffer */ | ||
101 | : : "r" (addr), "r" (end)); | ||
102 | } | ||
103 | |||
104 | /* clean DCache for this range */ | ||
105 | /* forces DCache writeback for the specified range */ | ||
106 | void clean_dcache_range(const void *base, unsigned int size) { | ||
107 | unsigned int addr = (int) base; | ||
108 | unsigned int end = addr+size; | ||
109 | asm volatile( | ||
110 | "bic %0, %0, #31 \n" | ||
111 | "clean_start: \n" | ||
112 | "mcr p15, 0, %0, c7, c10, 1 \n" /* Clean this line */ | ||
113 | "add %0, %0, #32 \n" | ||
114 | "cmp %0, %1 \n" | ||
115 | "blo clean_start \n" | ||
116 | "mov %0, #0\n" | ||
117 | "mcr p15,0,%0,c7,c10,4 \n" /* Drain write buffer */ | ||
118 | : : "r" (addr), "r" (end)); | ||
119 | } | ||
120 | |||
121 | /* Dump DCache for this range */ | ||
122 | /* Will *NOT* do write back */ | ||
123 | void dump_dcache_range(const void *base, unsigned int size) { | ||
124 | unsigned int addr = (int) base; | ||
125 | unsigned int end = addr+size; | ||
126 | asm volatile( | ||
127 | "tst %0, #31 \n" | ||
128 | "bic %0, %0, #31 \n" | ||
129 | "mcr p15, 0, %0, c7, c14, 1 \n" /* Clean and invalidate this line */ | ||
130 | "add %0, %0, #32 \n" | ||
131 | "tst %1, #31 \n" | ||
132 | "bic %1, %1, #31 \n" | ||
133 | "mcrne p15, 0, %1, c7, c14, 1 \n" /* Clean and invalidate this line, if not cache aligned */ | ||
134 | "cmp %0, %1 \n" | ||
135 | "beq dump_end \n" | ||
136 | "dump_start: \n" | ||
137 | "mcr p15, 0, %0, c7, c6, 1 \n" /* Invalidate this line */ | ||
138 | "add %0, %0, #32 \n" | ||
139 | "cmp %0, %1 \n" | ||
140 | "bne dump_start \n" | ||
141 | "dump_end: \n" | ||
142 | "mcr p15,0,%0,c7,c10,4 \n" /* Drain write buffer */ | ||
143 | : : "r" (addr), "r" (end)); | ||
144 | } | ||
145 | /* Cleans entire DCache */ | ||
146 | void clean_dcache(void) | ||
147 | { | ||
148 | unsigned int seg, index, addr; | ||
149 | |||
150 | /* @@@ This is straight from the manual. It needs to be optimized. */ | ||
151 | for(seg = 0; seg <= 7; seg++) { | ||
152 | for(index = 0; index <= 63; index++) { | ||
153 | addr = (seg << 5) | (index << 26); | ||
154 | asm volatile( | ||
155 | "mcr p15, 0, %0, c7, c10, 2 \n" /* Clean this entry by index */ | ||
156 | : : "r" (addr)); | ||
157 | } | ||
158 | } | ||
159 | } | ||
160 | |||