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authorJack Halpin <jack.halpin@gmail.com>2009-12-03 17:22:09 +0000
committerJack Halpin <jack.halpin@gmail.com>2009-12-03 17:22:09 +0000
commit7f88cc44aa99ee7559f077392a5fc66f0f995326 (patch)
tree910c99ec32de5148db4763b5ea092c04cb3a905a /firmware/target/arm/as3525
parent40629be046f8772d404ec5577be2452f5c516ef6 (diff)
downloadrockbox-7f88cc44aa99ee7559f077392a5fc66f0f995326.tar.gz
rockbox-7f88cc44aa99ee7559f077392a5fc66f0f995326.zip
Sansa AMS: Use some new macros to set the MCICLK frequency to help avoid missing the bypass bit when resetting frequencies with MCI_CLOCK register.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23831 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/as3525')
-rw-r--r--firmware/target/arm/as3525/ata_sd_as3525.c15
1 files changed, 10 insertions, 5 deletions
diff --git a/firmware/target/arm/as3525/ata_sd_as3525.c b/firmware/target/arm/as3525/ata_sd_as3525.c
index 961a124df3..17f7583f44 100644
--- a/firmware/target/arm/as3525/ata_sd_as3525.c
+++ b/firmware/target/arm/as3525/ata_sd_as3525.c
@@ -248,6 +248,11 @@ static bool send_cmd(const int drive, const int cmd, const int arg,
248 return false; 248 return false;
249} 249}
250 250
251#define MCI_FULLSPEED (MCI_CLOCK_ENABLE | MCI_CLOCK_BYPASS) /* MCLK */
252#define MCI_HALFSPEED (MCI_CLOCK_ENABLE) /* MCLK/2 */
253#define MCI_QUARTERSPEED (MCI_CLOCK_ENABLE | 1) /* MCLK/4 */
254#define MCI_IDENTSPEED (MCI_CLOCK_ENABLE | AS3525_SD_IDENT_DIV) /* IDENT */
255
251static int sd_init_card(const int drive) 256static int sd_init_card(const int drive)
252{ 257{
253 unsigned long response; 258 unsigned long response;
@@ -258,7 +263,7 @@ static int sd_init_card(const int drive)
258 263
259 264
260 /* MCLCK on and set to 400kHz ident frequency */ 265 /* MCLCK on and set to 400kHz ident frequency */
261 MCI_CLOCK(drive) = MCI_CLOCK_ENABLE | AS3525_SD_IDENT_DIV; 266 MCI_CLOCK(drive) = MCI_IDENTSPEED;
262 267
263 /* 100 - 400kHz clock required for Identification Mode */ 268 /* 100 - 400kHz clock required for Identification Mode */
264 /* Start of Card Identification Mode ************************************/ 269 /* Start of Card Identification Mode ************************************/
@@ -307,11 +312,11 @@ static int sd_init_card(const int drive)
307 312
308 /* End of Card Identification Mode ************************************/ 313 /* End of Card Identification Mode ************************************/
309 314
310 /* full speed for controller clock MCICLK = MCLK = PCLK = 62 MHz */ 315 /* Boost MCICLK to operating speed */ /* FIXME: 50 MHz is spec limit */
311 MCI_CLOCK(drive) |= MCI_CLOCK_BYPASS; /* FIXME: 50 MHz is spec limit */ 316 MCI_CLOCK(drive) = (sd_v2 ? MCI_FULLSPEED : MCI_FULLSPEED);
312 mci_delay(); 317
318#ifdef HAVE_MULTIDRIVE /* The internal SDs are v1 */
313 319
314#ifdef HAVE_MULTIDRIVE
315 /* Try to switch V2 cards to HS timings, non HS seem to ignore this */ 320 /* Try to switch V2 cards to HS timings, non HS seem to ignore this */
316 if(sd_v2) 321 if(sd_v2)
317 { 322 {