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authorRafaël Carré <rafael.carre@gmail.com>2010-05-27 23:32:38 +0000
committerRafaël Carré <rafael.carre@gmail.com>2010-05-27 23:32:38 +0000
commit6921a2b6b988e40fed1c2c3c5182381c26ef3d75 (patch)
treedd3ca9554ecf0a24d704d84b976b745955545b3e /firmware/target/arm/as3525
parent9d583f2b0b52919d961ed1853babebd6ec377c1d (diff)
downloadrockbox-6921a2b6b988e40fed1c2c3c5182381c26ef3d75.tar.gz
rockbox-6921a2b6b988e40fed1c2c3c5182381c26ef3d75.zip
Merge common LCD code between fuzev1 & fuzev2
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26344 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/as3525')
-rw-r--r--firmware/target/arm/as3525/lcd-fuze.c (renamed from firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c)120
-rw-r--r--firmware/target/arm/as3525/lcd-fuze.h56
-rw-r--r--firmware/target/arm/as3525/sansa-fuze/lcd-fuzev1.c88
-rw-r--r--firmware/target/arm/as3525/sansa-fuzev2/lcd-fuzev2.c394
4 files changed, 165 insertions, 493 deletions
diff --git a/firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c b/firmware/target/arm/as3525/lcd-fuze.c
index 54d4d73183..ef4791e6eb 100644
--- a/firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c
+++ b/firmware/target/arm/as3525/lcd-fuze.c
@@ -24,125 +24,24 @@
24 24
25#include "cpu.h" 25#include "cpu.h"
26#include "lcd.h" 26#include "lcd.h"
27#include "file.h"
28#include "debug.h"
29#include "system.h" 27#include "system.h"
28#include "file.h"
30#include "clock-target.h" 29#include "clock-target.h"
31#include "dbop-as3525.h" 30#include "dbop-as3525.h"
31#include "lcd-fuze.h"
32 32
33/* The controller is unknown, but some registers appear to be the same as the 33/* The controller is unknown, but some registers appear to be the same as the
34 HD66789R */ 34 HD66789R */
35static bool display_on = false; /* is the display turned on? */ 35static bool display_on = false; /* is the display turned on? */
36 36
37/* register defines */
38#define R_START_OSC 0x00
39#define R_DRV_OUTPUT_CONTROL 0x01
40#define R_DRV_WAVEFORM_CONTROL 0x02
41#define R_ENTRY_MODE 0x03
42#define R_COMPARE_REG1 0x04
43#define R_COMPARE_REG2 0x05
44
45#define R_DISP_CONTROL1 0x07
46#define R_DISP_CONTROL2 0x08
47#define R_DISP_CONTROL3 0x09
48
49#define R_FRAME_CYCLE_CONTROL 0x0b
50#define R_EXT_DISP_IF_CONTROL 0x0c
51
52#define R_POWER_CONTROL1 0x10
53#define R_POWER_CONTROL2 0x11
54#define R_POWER_CONTROL3 0x12
55#define R_POWER_CONTROL4 0x13
56
57#define R_RAM_ADDR_SET 0x21
58#define R_WRITE_DATA_2_GRAM 0x22
59
60#define R_GAMMA_FINE_ADJ_POS1 0x30
61#define R_GAMMA_FINE_ADJ_POS2 0x31
62#define R_GAMMA_FINE_ADJ_POS3 0x32
63#define R_GAMMA_GRAD_ADJ_POS 0x33
64
65#define R_GAMMA_FINE_ADJ_NEG1 0x34
66#define R_GAMMA_FINE_ADJ_NEG2 0x35
67#define R_GAMMA_FINE_ADJ_NEG3 0x36
68#define R_GAMMA_GRAD_ADJ_NEG 0x37
69
70#define R_GAMMA_AMP_ADJ_RES_POS 0x38
71#define R_GAMMA_AMP_AVG_ADJ_RES_NEG 0x39
72
73#define R_GATE_SCAN_POS 0x40
74#define R_VERT_SCROLL_CONTROL 0x41
75#define R_1ST_SCR_DRV_POS 0x42
76#define R_2ND_SCR_DRV_POS 0x43
77#define R_HORIZ_RAM_ADDR_POS 0x44
78#define R_VERT_RAM_ADDR_POS 0x45
79
80/* Flip Flag */ 37/* Flip Flag */
81#define R_ENTRY_MODE_HORZ_NORMAL 0x7030
82#define R_ENTRY_MODE_HORZ_FLIPPED 0x7000
83static unsigned short r_entry_mode = R_ENTRY_MODE_HORZ_NORMAL; 38static unsigned short r_entry_mode = R_ENTRY_MODE_HORZ_NORMAL;
84#define R_ENTRY_MODE_VERT 0x7038
85#define R_ENTRY_MODE_SOLID_VERT 0x1038
86/* FIXME */
87#define R_ENTRY_MODE_VIDEO_NORMAL 0x7038
88#define R_ENTRY_MODE_VIDEO_FLIPPED 0x7018
89 39
90/* Reverse Flag */ 40/* Reverse Flag */
91#define R_DISP_CONTROL_NORMAL 0x0004
92#define R_DISP_CONTROL_REV 0x0000
93static unsigned short r_disp_control_rev = R_DISP_CONTROL_NORMAL; 41static unsigned short r_disp_control_rev = R_DISP_CONTROL_NORMAL;
94 42
95static const int xoffset = 20; 43static const int xoffset = 20;
96 44
97static inline void lcd_delay(int x)
98{
99 do {
100 asm volatile ("nop\n");
101 } while (x--);
102}
103
104static void as3525_dbop_init(void)
105{
106 CGU_DBOP = (1<<3) | AS3525_DBOP_DIV;
107
108 DBOP_TIMPOL_01 = 0xe167e167;
109 DBOP_TIMPOL_23 = 0xe167006e;
110
111 /* short count: 16 | output data width: 16 | readstrobe line */
112 DBOP_CTRL = (1<<18|1<<12|1<<3);
113
114 GPIOB_AFSEL = 0xfc;
115 GPIOC_AFSEL = 0xff;
116
117 DBOP_TIMPOL_23 = 0x6000e;
118
119 /* short count: 16|enable write|output data width: 16|read strobe line */
120 DBOP_CTRL = (1<<18|1<<16|1<<12|1<<3);
121 DBOP_TIMPOL_01 = 0x6e167;
122 DBOP_TIMPOL_23 = 0xa167e06f;
123
124 /* TODO: The OF calls some other functions here, but maybe not important */
125}
126
127static void lcd_write_cmd(short cmd)
128{
129 /* Write register */
130 DBOP_TIMPOL_23 = 0xa167006e;
131 dbop_write_data(&cmd, 1);
132
133 lcd_delay(4);
134
135 DBOP_TIMPOL_23 = 0xa167e06f;
136}
137
138static void lcd_write_reg(int reg, int value)
139{
140 int16_t data = value;
141
142 lcd_write_cmd(reg);
143 dbop_write_data(&data, 1);
144}
145
146/*** hardware configuration ***/ 45/*** hardware configuration ***/
147 46
148void lcd_set_contrast(int val) 47void lcd_set_contrast(int val)
@@ -175,7 +74,7 @@ void lcd_set_flip(bool yesno)
175} 74}
176#endif 75#endif
177 76
178static void _display_on(void) 77void fuze_display_on(void)
179{ 78{
180 /* Initialise in the same way as the original firmare */ 79 /* Initialise in the same way as the original firmare */
181 80
@@ -223,19 +122,6 @@ static void _display_on(void)
223 lcd_update(); 122 lcd_update();
224} 123}
225 124
226void lcd_init_device(void)
227{
228 as3525_dbop_init();
229
230 GPIOA_DIR |= (1<<5|1<<4|1<<3);
231 GPIOA_PIN(5) = 0;
232 GPIOA_PIN(3) = (1<<3);
233 GPIOA_PIN(4) = 0;
234 GPIOA_PIN(5) = (1<<5);
235
236 _display_on();
237}
238
239#if defined(HAVE_LCD_ENABLE) 125#if defined(HAVE_LCD_ENABLE)
240void lcd_enable(bool on) 126void lcd_enable(bool on)
241{ 127{
diff --git a/firmware/target/arm/as3525/lcd-fuze.h b/firmware/target/arm/as3525/lcd-fuze.h
new file mode 100644
index 0000000000..00bb960ef1
--- /dev/null
+++ b/firmware/target/arm/as3525/lcd-fuze.h
@@ -0,0 +1,56 @@
1/* register defines */
2#define R_START_OSC 0x00
3#define R_DRV_OUTPUT_CONTROL 0x01
4#define R_DRV_WAVEFORM_CONTROL 0x02
5#define R_ENTRY_MODE 0x03
6#define R_COMPARE_REG1 0x04
7#define R_COMPARE_REG2 0x05
8
9#define R_DISP_CONTROL1 0x07
10#define R_DISP_CONTROL2 0x08
11#define R_DISP_CONTROL3 0x09
12
13#define R_FRAME_CYCLE_CONTROL 0x0b
14#define R_EXT_DISP_IF_CONTROL 0x0c
15
16#define R_POWER_CONTROL1 0x10
17#define R_POWER_CONTROL2 0x11
18#define R_POWER_CONTROL3 0x12
19#define R_POWER_CONTROL4 0x13
20
21#define R_RAM_ADDR_SET 0x21
22#define R_WRITE_DATA_2_GRAM 0x22
23
24#define R_GAMMA_FINE_ADJ_POS1 0x30
25#define R_GAMMA_FINE_ADJ_POS2 0x31
26#define R_GAMMA_FINE_ADJ_POS3 0x32
27#define R_GAMMA_GRAD_ADJ_POS 0x33
28
29#define R_GAMMA_FINE_ADJ_NEG1 0x34
30#define R_GAMMA_FINE_ADJ_NEG2 0x35
31#define R_GAMMA_FINE_ADJ_NEG3 0x36
32#define R_GAMMA_GRAD_ADJ_NEG 0x37
33
34#define R_GAMMA_AMP_ADJ_RES_POS 0x38
35#define R_GAMMA_AMP_AVG_ADJ_RES_NEG 0x39
36
37#define R_GATE_SCAN_POS 0x40
38#define R_VERT_SCROLL_CONTROL 0x41
39#define R_1ST_SCR_DRV_POS 0x42
40#define R_2ND_SCR_DRV_POS 0x43
41#define R_HORIZ_RAM_ADDR_POS 0x44
42#define R_VERT_RAM_ADDR_POS 0x45
43
44/* Flip Flag */
45#define R_ENTRY_MODE_HORZ_NORMAL 0x1030
46#define R_ENTRY_MODE_HORZ_FLIPPED 0x1000
47#define R_ENTRY_MODE_VIDEO_NORMAL 0x1038
48#define R_ENTRY_MODE_VIDEO_FLIPPED 0x1018
49
50/* Reverse Flag */
51#define R_DISP_CONTROL_NORMAL 0x0004
52#define R_DISP_CONTROL_REV 0x0000
53
54void lcd_write_cmd(int16_t cmd);
55void lcd_write_reg(int reg, int value);
56void fuze_display_on(void);
diff --git a/firmware/target/arm/as3525/sansa-fuze/lcd-fuzev1.c b/firmware/target/arm/as3525/sansa-fuze/lcd-fuzev1.c
new file mode 100644
index 0000000000..0c56ee3070
--- /dev/null
+++ b/firmware/target/arm/as3525/sansa-fuze/lcd-fuzev1.c
@@ -0,0 +1,88 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2008 by Dave Chapman
11 *
12 * LCD driver for the Sansa Fuze - controller unknown
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version 2
17 * of the License, or (at your option) any later version.
18 *
19 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
20 * KIND, either express or implied.
21 *
22 ****************************************************************************/
23#include "config.h"
24
25#include "cpu.h"
26#include "lcd.h"
27#include "system.h"
28#include "clock-target.h"
29#include "dbop-as3525.h"
30#include "lcd-fuze.h"
31
32void lcd_write_cmd(int16_t cmd)
33{
34 /* Write register */
35 DBOP_TIMPOL_23 = 0xa167006e;
36 dbop_write_data(&cmd, 1);
37
38 int delay = 4;
39 do {
40 nop;
41 } while(delay--);
42
43 DBOP_TIMPOL_23 = 0xa167e06f;
44}
45
46void lcd_write_reg(int reg, int value)
47{
48 int16_t data = value;
49
50 lcd_write_cmd(reg);
51 dbop_write_data(&data, 1);
52}
53
54
55static void as3525_dbop_init(void)
56{
57 CGU_DBOP = (1<<3) | AS3525_DBOP_DIV;
58
59 DBOP_TIMPOL_01 = 0xe167e167;
60 DBOP_TIMPOL_23 = 0xe167006e;
61
62 /* short count: 16 | output data width: 16 | readstrobe line */
63 DBOP_CTRL = (1<<18|1<<12|1<<3);
64
65 GPIOB_AFSEL = 0xfc;
66 GPIOC_AFSEL = 0xff;
67
68 DBOP_TIMPOL_23 = 0x6000e;
69
70 /* short count: 16|enable write|output data width: 16|read strobe line */
71 DBOP_CTRL = (1<<18|1<<16|1<<12|1<<3);
72 DBOP_TIMPOL_01 = 0x6e167;
73 DBOP_TIMPOL_23 = 0xa167e06f;
74}
75
76
77void lcd_init_device(void)
78{
79 as3525_dbop_init();
80
81 GPIOA_DIR |= (1<<5|1<<4|1<<3);
82 GPIOA_PIN(5) = 0;
83 GPIOA_PIN(3) = (1<<3);
84 GPIOA_PIN(4) = 0;
85 GPIOA_PIN(5) = (1<<5);
86
87 fuze_display_on();
88}
diff --git a/firmware/target/arm/as3525/sansa-fuzev2/lcd-fuzev2.c b/firmware/target/arm/as3525/sansa-fuzev2/lcd-fuzev2.c
index 9797815d23..fd6bcb45fc 100644
--- a/firmware/target/arm/as3525/sansa-fuzev2/lcd-fuzev2.c
+++ b/firmware/target/arm/as3525/sansa-fuzev2/lcd-fuzev2.c
@@ -25,82 +25,33 @@
25 25
26#include "cpu.h" 26#include "cpu.h"
27#include "lcd.h" 27#include "lcd.h"
28#include "file.h"
29#include "debug.h"
30#include "system.h" 28#include "system.h"
31#include "clock-target.h" 29#include "clock-target.h"
32#include "dbop-as3525.h" 30#include "dbop-as3525.h"
31#include "lcd-fuze.h"
33 32
34/* The controller is unknown, but some registers appear to be the same as the 33void lcd_write_cmd(int16_t cmd)
35 HD66789R */ 34{
36static bool display_on = false; /* is the display turned on? */ 35 unsigned short data = swap16(cmd);
37 36 DBOP_TIMPOL_23 = 0xA12F0036;
38/* register defines */ 37 dbop_write_data(&data, 1);
39#define R_START_OSC 0x00
40#define R_DRV_OUTPUT_CONTROL 0x01
41#define R_DRV_WAVEFORM_CONTROL 0x02
42#define R_ENTRY_MODE 0x03
43#define R_COMPARE_REG1 0x04
44#define R_COMPARE_REG2 0x05
45
46#define R_DISP_CONTROL1 0x07
47#define R_DISP_CONTROL2 0x08
48#define R_DISP_CONTROL3 0x09
49
50#define R_FRAME_CYCLE_CONTROL 0x0b
51#define R_EXT_DISP_IF_CONTROL 0x0c
52
53#define R_POWER_CONTROL1 0x10
54#define R_POWER_CONTROL2 0x11
55#define R_POWER_CONTROL3 0x12
56#define R_POWER_CONTROL4 0x13
57
58#define R_RAM_ADDR_SET 0x21
59#define R_WRITE_DATA_2_GRAM 0x22
60
61#define R_GAMMA_FINE_ADJ_POS1 0x30
62#define R_GAMMA_FINE_ADJ_POS2 0x31
63#define R_GAMMA_FINE_ADJ_POS3 0x32
64#define R_GAMMA_GRAD_ADJ_POS 0x33
65
66#define R_GAMMA_FINE_ADJ_NEG1 0x34
67#define R_GAMMA_FINE_ADJ_NEG2 0x35
68#define R_GAMMA_FINE_ADJ_NEG3 0x36
69#define R_GAMMA_GRAD_ADJ_NEG 0x37
70
71#define R_GAMMA_AMP_ADJ_RES_POS 0x38
72#define R_GAMMA_AMP_AVG_ADJ_RES_NEG 0x39
73
74#define R_GATE_SCAN_POS 0x40
75#define R_VERT_SCROLL_CONTROL 0x41
76#define R_1ST_SCR_DRV_POS 0x42
77#define R_2ND_SCR_DRV_POS 0x43
78#define R_HORIZ_RAM_ADDR_POS 0x44
79#define R_VERT_RAM_ADDR_POS 0x45
80
81/* Flip Flag */
82#define R_ENTRY_MODE_HORZ_NORMAL 0x7030
83#define R_ENTRY_MODE_HORZ_FLIPPED 0x7000
84static unsigned short r_entry_mode = R_ENTRY_MODE_HORZ_NORMAL;
85#define R_ENTRY_MODE_VERT 0x7038
86#define R_ENTRY_MODE_SOLID_VERT 0x1038
87#define R_ENTRY_MODE_VIDEO_NORMAL 0x7038
88#define R_ENTRY_MODE_VIDEO_FLIPPED 0x7018
89 38
90/* Reverse Flag */ 39 int delay = 32;
91#define R_DISP_CONTROL_NORMAL 0x0004 40 do {
92#define R_DISP_CONTROL_REV 0x0000 41 nop;
93static unsigned short r_disp_control_rev = R_DISP_CONTROL_NORMAL; 42 } while(delay--);
94 43
95static const int xoffset = 20; 44 DBOP_TIMPOL_23 = 0xA12FE037;
45}
96 46
97static inline void lcd_delay(int x) 47void lcd_write_reg(int reg, int value)
98{ 48{
99 do { 49 int16_t data = swap16(value);
100 asm volatile ("nop\n"); 50 lcd_write_cmd(reg);
101 } while (x--); 51 dbop_write_data(&data, 1);
102} 52}
103 53
54
104static void as3525_dbop_init(void) 55static void as3525_dbop_init(void)
105{ 56{
106 CCU_IO |= 1<<12; 57 CCU_IO |= 1<<12;
@@ -115,102 +66,6 @@ static void as3525_dbop_init(void)
115} 66}
116 67
117 68
118static void lcd_write_cmd(unsigned short cmd)
119{
120 unsigned short data = swap16(cmd);
121 DBOP_TIMPOL_23 = 0xA12F0036;
122 dbop_write_data(&data, 1);
123 lcd_delay(32);
124 DBOP_TIMPOL_23 = 0xA12FE037;
125}
126
127static void lcd_write_reg(int reg, int value)
128{
129 int16_t data = swap16(value);
130 lcd_write_cmd(reg);
131 dbop_write_data(&data, 1);
132}
133
134/*** hardware configuration ***/
135
136void lcd_set_contrast(int val)
137{
138 (void)val;
139}
140
141void lcd_set_invert_display(bool yesno)
142{
143 r_disp_control_rev = yesno ? R_DISP_CONTROL_REV :
144 R_DISP_CONTROL_NORMAL;
145
146 if (display_on)
147 {
148 lcd_write_reg(R_DISP_CONTROL1, 0x0013 | r_disp_control_rev);
149 }
150
151}
152
153#ifdef HAVE_LCD_FLIP
154static bool display_flipped = false;
155
156/* turn the display upside down */
157void lcd_set_flip(bool yesno)
158{
159 display_flipped = yesno;
160
161 r_entry_mode = yesno ? R_ENTRY_MODE_HORZ_FLIPPED :
162 R_ENTRY_MODE_HORZ_NORMAL;
163}
164#endif
165
166static void _display_on(void)
167{
168 /* Initialise in the same way as the original firmare */
169
170 lcd_write_reg(R_DISP_CONTROL1, 0);
171 lcd_write_reg(R_POWER_CONTROL4, 0);
172
173 lcd_write_reg(R_POWER_CONTROL2, 0x3704);
174 lcd_write_reg(0x14, 0x1a1b);
175 lcd_write_reg(R_POWER_CONTROL1, 0x3860);
176 lcd_write_reg(R_POWER_CONTROL4, 0x40);
177
178 lcd_write_reg(R_POWER_CONTROL4, 0x60);
179
180 lcd_write_reg(R_POWER_CONTROL4, 0x70);
181 lcd_write_reg(R_DRV_OUTPUT_CONTROL, 277);
182 lcd_write_reg(R_DRV_WAVEFORM_CONTROL, (7<<8));
183 lcd_write_reg(R_ENTRY_MODE, r_entry_mode);
184 lcd_write_reg(R_DISP_CONTROL2, 0x01);
185 lcd_write_reg(R_FRAME_CYCLE_CONTROL, (1<<10));
186 lcd_write_reg(R_EXT_DISP_IF_CONTROL, 0);
187
188 lcd_write_reg(R_GAMMA_FINE_ADJ_POS1, 0x40);
189 lcd_write_reg(R_GAMMA_FINE_ADJ_POS2, 0x0687);
190 lcd_write_reg(R_GAMMA_FINE_ADJ_POS3, 0x0306);
191 lcd_write_reg(R_GAMMA_GRAD_ADJ_POS, 0x104);
192 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG1, 0x0585);
193 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG2, 255+66);
194 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG3, 0x0687+128);
195 lcd_write_reg(R_GAMMA_GRAD_ADJ_NEG, 259);
196 lcd_write_reg(R_GAMMA_AMP_ADJ_RES_POS, 0);
197 lcd_write_reg(R_GAMMA_AMP_AVG_ADJ_RES_NEG, 0);
198
199 lcd_write_reg(R_1ST_SCR_DRV_POS, (LCD_WIDTH - 1));
200 lcd_write_reg(R_2ND_SCR_DRV_POS, 0);
201 lcd_write_reg(R_HORIZ_RAM_ADDR_POS, (LCD_WIDTH - 1));
202 lcd_write_reg(R_VERT_RAM_ADDR_POS, 0);
203 lcd_write_reg(0x46, (((LCD_WIDTH - 1) + xoffset) << 8) | xoffset);
204 lcd_write_reg(0x47, (LCD_HEIGHT - 1));
205 lcd_write_reg(0x48, 0x0);
206
207 lcd_write_reg(R_DISP_CONTROL1, 0x11);
208 lcd_write_reg(R_DISP_CONTROL1, 0x13 | r_disp_control_rev);
209
210 display_on = true; /* must be done before calling lcd_update() */
211 lcd_update();
212}
213
214void lcd_init_device(void) 69void lcd_init_device(void)
215{ 70{
216 as3525_dbop_init(); 71 as3525_dbop_init();
@@ -229,218 +84,5 @@ void lcd_init_device(void)
229 GPIOA_PIN(4) = 1<<4; 84 GPIOA_PIN(4) = 1<<4;
230 GPIOA_PIN(5) = 1<<5; 85 GPIOA_PIN(5) = 1<<5;
231 86
232 _display_on(); 87 fuze_display_on();
233}
234
235#if defined(HAVE_LCD_ENABLE)
236void lcd_enable(bool on)
237{
238 if (display_on == on)
239 return;
240
241 if(on)
242 {
243 lcd_write_reg(R_START_OSC, 1);
244 lcd_write_reg(R_POWER_CONTROL1, 0);
245 lcd_write_reg(R_POWER_CONTROL2, 0x3704);
246 lcd_write_reg(0x14, 0x1a1b);
247 lcd_write_reg(R_POWER_CONTROL1, 0x3860);
248 lcd_write_reg(R_POWER_CONTROL4, 0x40);
249 lcd_write_reg(R_POWER_CONTROL4, 0x60);
250 lcd_write_reg(R_POWER_CONTROL4, 112);
251 lcd_write_reg(R_DISP_CONTROL1, 0x11);
252 lcd_write_reg(R_DISP_CONTROL1, 0x13 | r_disp_control_rev);
253 display_on = true;
254 lcd_update(); /* Resync display */
255 send_event(LCD_EVENT_ACTIVATION, NULL);
256 sleep(0);
257
258 }
259 else
260 {
261 lcd_write_reg(R_DISP_CONTROL1, 0x22);
262 lcd_write_reg(R_DISP_CONTROL1, 0);
263 lcd_write_reg(R_POWER_CONTROL1, 1);
264 display_on = false;
265 }
266}
267#endif
268
269#if defined(HAVE_LCD_ENABLE) || defined(HAVE_LCD_SLEEP)
270bool lcd_active(void)
271{
272 return display_on;
273}
274#endif
275
276/*** update functions ***/
277
278/* FIXME : find the datasheet for this RENESAS controller so we identify the
279 * registers used in windowing code (not present in HD66789R) */
280
281/* Set horizontal window addresses */
282static void lcd_window_x(int xmin, int xmax)
283{
284 xmin += xoffset;
285 xmax += xoffset;
286 lcd_write_reg(R_HORIZ_RAM_ADDR_POS + 2, (xmax << 8) | xmin);
287 lcd_write_reg(R_RAM_ADDR_SET - 1, xmin);
288}
289
290/* Set vertical window addresses */
291static void lcd_window_y(int ymin, int ymax)
292{
293 lcd_write_reg(R_VERT_RAM_ADDR_POS + 2, ymax);
294 lcd_write_reg(R_VERT_RAM_ADDR_POS + 3, ymin);
295 lcd_write_reg(R_RAM_ADDR_SET, ymin);
296}
297
298static unsigned lcd_yuv_options = 0;
299
300void lcd_yuv_set_options(unsigned options)
301{
302 lcd_yuv_options = options;
303}
304
305
306#ifndef BOOTLOADER
307/* Line write helper function for lcd_yuv_blit. Write two lines of yuv420. */
308extern void lcd_write_yuv420_lines(unsigned char const * const src[3],
309 int width,
310 int stride);
311extern void lcd_write_yuv420_lines_odither(unsigned char const * const src[3],
312 int width,
313 int stride,
314 int x_screen, /* To align dither pattern */
315 int y_screen);
316
317/* Performance function to blit a YUV bitmap directly to the LCD
318 * src_x, src_y, width and height should be even
319 * x, y, width and height have to be within LCD bounds
320 */
321void lcd_blit_yuv(unsigned char * const src[3],
322 int src_x, int src_y, int stride,
323 int x, int y, int width, int height)
324{
325 unsigned char const * yuv_src[3];
326 off_t z;
327
328 /* Sorry, but width and height must be >= 2 or else */
329 width &= ~1;
330 height >>= 1;
331
332 z = stride*src_y;
333 yuv_src[0] = src[0] + z + src_x;
334 yuv_src[1] = src[1] + (z >> 2) + (src_x >> 1);
335 yuv_src[2] = src[2] + (yuv_src[1] - src[1]);
336
337#ifdef HAVE_LCD_FLIP
338 lcd_write_reg(R_ENTRY_MODE,
339 display_flipped ? R_ENTRY_MODE_VIDEO_FLIPPED : R_ENTRY_MODE_VIDEO_NORMAL
340 );
341#else
342 lcd_write_reg(R_ENTRY_MODE, R_ENTRY_MODE_VIDEO_NORMAL);
343#endif
344
345 lcd_window_x(x, x + width - 1);
346
347 if (lcd_yuv_options & LCD_YUV_DITHER)
348 {
349 do
350 {
351 lcd_window_y(y, y + 1);
352
353 lcd_write_cmd(R_WRITE_DATA_2_GRAM);
354 lcd_write_yuv420_lines_odither(yuv_src, width, stride, x, y);
355 yuv_src[0] += stride << 1; /* Skip down two luma lines */
356 yuv_src[1] += stride >> 1; /* Skip down one chroma line */
357 yuv_src[2] += stride >> 1;
358 y += 2;
359 }
360 while (--height > 0);
361 }
362 else
363 {
364 do
365 {
366 lcd_window_y(y, y + 1);
367
368 lcd_write_cmd(R_WRITE_DATA_2_GRAM);
369 lcd_write_yuv420_lines(yuv_src, width, stride);
370 yuv_src[0] += stride << 1; /* Skip down two luma lines */
371 yuv_src[1] += stride >> 1; /* Skip down one chroma line */
372 yuv_src[2] += stride >> 1;
373 y += 2;
374 }
375 while (--height > 0);
376 }
377}
378
379#endif
380
381
382/* Update the display.
383 This must be called after all other LCD functions that change the display. */
384void lcd_update(void)
385{
386 if (!display_on)
387 return;
388
389 lcd_write_reg(R_ENTRY_MODE, r_entry_mode);
390
391 lcd_window_x(0, LCD_WIDTH - 1);
392 lcd_window_y(0, LCD_HEIGHT - 1);
393
394 lcd_write_cmd(R_WRITE_DATA_2_GRAM);
395
396 lcd_update_rect(0,0, LCD_WIDTH, LCD_HEIGHT);
397}
398
399/* Update a fraction of the display. */
400void lcd_update_rect(int x, int y, int width, int height)
401{
402 const fb_data *ptr;
403
404 if (!display_on)
405 return;
406
407 /* nothing to draw? */
408 if ((width <= 0) || (height <= 0) || (x >= LCD_WIDTH) ||
409 (y >= LCD_HEIGHT) || (x + width <= 0) || (y + height <= 0))
410 return;
411
412 if (x < 0)
413 { /* clip left */
414 width += x;
415 x = 0;
416 }
417 if (y < 0)
418 { /* clip top */
419 height += y;
420 y = 0;
421 }
422 if (x + width > LCD_WIDTH)
423 width = LCD_WIDTH - x; /* clip right */
424 if (y + height > LCD_HEIGHT)
425 height = LCD_HEIGHT - y; /* clip bottom */
426
427 lcd_write_reg(R_ENTRY_MODE, r_entry_mode);
428
429 /* we need to make x and width even to enable 32bit transfers */
430 width = (width + (x & 1) + 1) & ~1;
431 x &= ~1;
432
433 lcd_window_x(x, x + width - 1);
434 lcd_window_y(y, y + height -1);
435
436 lcd_write_cmd(R_WRITE_DATA_2_GRAM);
437
438 ptr = &lcd_framebuffer[y][x];
439
440 do
441 {
442 dbop_write_data(ptr, width);
443 ptr += LCD_WIDTH;
444 }
445 while (--height > 0);
446} 88}
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