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author | William Wilgus <me.theuser@yahoo.com> | 2018-07-27 23:56:32 +0200 |
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committer | William Wilgus <me.theuser@yahoo.com> | 2018-07-27 23:56:32 +0200 |
commit | 6f0320a9535bc1aa81d83fa879ac14d5ee603658 (patch) | |
tree | 3b12fc361595ecd2249f391e114036cb30150105 /firmware/target/arm/as3525/system-target.h | |
parent | 400603abdfb4ba7566e0cae8dbed9268f06716dc (diff) | |
download | rockbox-6f0320a9535bc1aa81d83fa879ac14d5ee603658.tar.gz rockbox-6f0320a9535bc1aa81d83fa879ac14d5ee603658.zip |
As3525 v1/v2 Add power savings menu
Allow user to select cpu undervolt
There have been quite a few issues across the SANSA AMS line related
to CPU undervolting while most players show greatly increased runtime
some crash.
Rather than constanly upping the voltage we now have a
setting with a safe value for all players and the option for lower voltages
I plan to add a few other options here later such as disk
timings and maybe some other clocks/experimental settings
Added: Disk Low speed option for AS3525v2 devices cuts
frequency to 12 MHz from 24 MHz
Added: Disk Low speed option for AS3525v1 devices cuts
frequency to 15.5 MHz from 31 MHz
Added: I2c Low Speed AS3525 devices, should be bigger improvement for v1 devices
Fixed: Debug menu for AS3525v2 No SDSLOT frequency,
Showed IDE freq though it is unused
Added: DBOP and SSP underclocking affects display on v1/v2 respectively
Fixed: debug menu now has SSP frequency, and SSP_CPSR
Update: made settings menu more generic
Update: cleaned up code
Added: Clip v1 & Fuze v1 didn't have HAVE_ADJUSTABLE_CPU_VOLTAGE.
not sure why but, waiting on testing to confirm
Added: C200v2 and E200v2 devices and HAVE_ADJUSTABLE_CPU_VOLTAGE.
Fixed: v1 devices don't like display timing set lower (dbop)
v1 devices don't have a divider set for ssp (causes divide by 0)
Fixed: ClipZip display lags with Max SSP divider changed from 0xFE to 0x32
Fixed: v1 devices didn't work properly with highspeed sd cards
Added code from http://gerrit.rockbox.org/r/#/c/1704/
Added powersave and IDE interface enable/disable
Added: V2 devices now have powersave enabled on sd interface
Update: cleaned up code, lang defines, added manual entries
Update ssp clock mechanism added calculated ssp divider to clipzip
Update turn display clock off when clip+ turns off display
Fixed: clipzip wrong register for SSP clock
Change-Id: I04137682243be92f0f8d8bf1cfa54fbb1965559b
TODO: add other players?
Diffstat (limited to 'firmware/target/arm/as3525/system-target.h')
-rw-r--r-- | firmware/target/arm/as3525/system-target.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/firmware/target/arm/as3525/system-target.h b/firmware/target/arm/as3525/system-target.h index 5cdc573a1b..9c5b5a9cd6 100644 --- a/firmware/target/arm/as3525/system-target.h +++ b/firmware/target/arm/as3525/system-target.h | |||
@@ -73,6 +73,26 @@ static inline void mdelay(unsigned msecs) | |||
73 | void usb_insert_int(void); | 73 | void usb_insert_int(void); |
74 | void usb_remove_int(void); | 74 | void usb_remove_int(void); |
75 | 75 | ||
76 | |||
77 | #ifdef CONFIG_POWER_SAVING | ||
78 | /* Powersave functions either manipulate the system directly | ||
79 | or pass enabled flag on to the devices specific function | ||
80 | dis/enabling powersaving for the selected subsystem | ||
81 | */ | ||
82 | #if (CONFIG_POWER_SAVING & POWERSV_CPU) | ||
83 | void cpu_set_powersave(bool enabled); | ||
84 | #endif | ||
85 | #if (CONFIG_POWER_SAVING & POWERSV_DISP) | ||
86 | void disp_set_powersave(bool enabled); | ||
87 | #endif | ||
88 | #if (CONFIG_POWER_SAVING & POWERSV_DISK) | ||
89 | void disk_set_powersave(bool enabled); | ||
90 | #endif | ||
91 | #if (CONFIG_POWER_SAVING & POWERSV_I2C) | ||
92 | void i2c_set_powersave(bool enabled); | ||
93 | #endif | ||
94 | #endif /*CONFIG_POWER_SAVING*/ | ||
95 | |||
76 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ | 96 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ |
77 | #define CPU_BOOST_LOCK_DEFINED | 97 | #define CPU_BOOST_LOCK_DEFINED |
78 | 98 | ||