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author | Fred Bauer <fred.w.bauer@gmail.com> | 2010-12-29 16:07:15 +0000 |
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committer | Fred Bauer <fred.w.bauer@gmail.com> | 2010-12-29 16:07:15 +0000 |
commit | e541c98a7e19f22ab62a0adb370ea9f4c922e666 (patch) | |
tree | 74aa302fcc9e3c1ea05c9f45ad1724da8badd71e /firmware/target/arm/as3525/system-as3525.c | |
parent | 7f31e38ac12884db251734482e0d37174c62e40b (diff) | |
download | rockbox-e541c98a7e19f22ab62a0adb370ea9f4c922e666.tar.gz rockbox-e541c98a7e19f22ab62a0adb370ea9f4c922e666.zip |
revert r28834 because it causes problems with uSD
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28925 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/as3525/system-as3525.c')
-rw-r--r-- | firmware/target/arm/as3525/system-as3525.c | 42 |
1 files changed, 2 insertions, 40 deletions
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index 2c4543fa33..d8059715d0 100644 --- a/firmware/target/arm/as3525/system-as3525.c +++ b/firmware/target/arm/as3525/system-as3525.c | |||
@@ -33,12 +33,6 @@ | |||
33 | #include "backlight-target.h" | 33 | #include "backlight-target.h" |
34 | #include "lcd.h" | 34 | #include "lcd.h" |
35 | 35 | ||
36 | /* FIXME */ | ||
37 | #define I2C2_CPSR0 *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x1C)) | ||
38 | #define I2C2_CPSR1 *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x20)) | ||
39 | extern void sd_set_boosted_divider(void); | ||
40 | extern void sd_set_unboosted_divider(void); | ||
41 | |||
42 | #define default_interrupt(name) \ | 36 | #define default_interrupt(name) \ |
43 | extern __attribute__((weak,alias("UIRQ"))) void name (void) | 37 | extern __attribute__((weak,alias("UIRQ"))) void name (void) |
44 | 38 | ||
@@ -292,12 +286,7 @@ void system_init(void) | |||
292 | #endif | 286 | #endif |
293 | 287 | ||
294 | /* Initialize power management settings */ | 288 | /* Initialize power management settings */ |
295 | #if CONFIG_CPU == AS3525 | ||
296 | ascodec_write(AS3514_CVDD_DCDC3, AS314_CP_DCDC3_SETTING|CVDD_1_10); | ||
297 | #else | ||
298 | ascodec_write(AS3514_CVDD_DCDC3, AS314_CP_DCDC3_SETTING); | 289 | ascodec_write(AS3514_CVDD_DCDC3, AS314_CP_DCDC3_SETTING); |
299 | #endif | ||
300 | |||
301 | #if CONFIG_TUNER | 290 | #if CONFIG_TUNER |
302 | fmradio_i2c_init(); | 291 | fmradio_i2c_init(); |
303 | #endif | 292 | #endif |
@@ -365,9 +354,7 @@ void set_cpu_frequency(long frequency) | |||
365 | { | 354 | { |
366 | if(frequency == CPUFREQ_MAX) | 355 | if(frequency == CPUFREQ_MAX) |
367 | { | 356 | { |
368 | #if defined(HAVE_ADJUSTABLE_CPU_VOLTAGE) && (CPUFREQ_MAX > 200000000) | 357 | #ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE |
369 | /* This doesn't work anymore. It was written before ascodec | ||
370 | was switched to use interrupts */ | ||
371 | /* Increasing frequency so boost voltage before change */ | 358 | /* Increasing frequency so boost voltage before change */ |
372 | ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_20)); | 359 | ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_20)); |
373 | 360 | ||
@@ -387,35 +374,10 @@ void set_cpu_frequency(long frequency) | |||
387 | "mcr p15, 0, r0, c1, c0 \n" | 374 | "mcr p15, 0, r0, c1, c0 \n" |
388 | : : : "r0" ); | 375 | : : : "r0" ); |
389 | 376 | ||
390 | #ifdef HAVE_MULTIDRIVE | ||
391 | /* Set uSD frequency */ | ||
392 | sd_set_boosted_divider(); | ||
393 | #endif | ||
394 | /* Set I2C frequency */ | ||
395 | I2C2_CPSR0 = AS3525_I2C_PRESCALER_BOOSTED & 0xFF; /* 8 lsb */ | ||
396 | I2C2_CPSR1 = (AS3525_I2C_PRESCALER_BOOSTED >> 8) & 0x3; /* 2 msb */ | ||
397 | /* Set PCLK frequency */ | ||
398 | CGU_PERI = ((CGU_PERI & ~0x7F) | /* reset divider & clksel bits */ | ||
399 | (AS3525_PCLK_DIV0_BOOSTED << 2) | | ||
400 | (AS3525_PCLK_DIV1_BOOSTED << 6) | | ||
401 | AS3525_PCLK_SEL); | ||
402 | cpu_frequency = CPUFREQ_MAX; | 377 | cpu_frequency = CPUFREQ_MAX; |
403 | } | 378 | } |
404 | else | 379 | else |
405 | { | 380 | { |
406 | /* Set I2C frequency */ | ||
407 | I2C2_CPSR0 = AS3525_I2C_PRESCALER & 0xFF; /* 8 lsb */ | ||
408 | I2C2_CPSR1 = (AS3525_I2C_PRESCALER >> 8) & 0x3; /* 2 msb */ | ||
409 | /* Set PCLK frequency */ | ||
410 | CGU_PERI = ((CGU_PERI & ~0x7F) | /* reset divider & clksel bits */ | ||
411 | (AS3525_PCLK_DIV0 << 2) | | ||
412 | (AS3525_PCLK_DIV1 << 6) | | ||
413 | AS3525_PCLK_SEL); | ||
414 | |||
415 | #ifdef HAVE_MULTIDRIVE | ||
416 | /* Set uSD frequency */ | ||
417 | sd_set_unboosted_divider(); | ||
418 | #endif | ||
419 | asm volatile( | 381 | asm volatile( |
420 | "mrc p15, 0, r0, c1, c0 \n" | 382 | "mrc p15, 0, r0, c1, c0 \n" |
421 | "bic r0, r0, #3<<30 \n" /* fastbus clocking */ | 383 | "bic r0, r0, #3<<30 \n" /* fastbus clocking */ |
@@ -425,7 +387,7 @@ void set_cpu_frequency(long frequency) | |||
425 | /* FCLK is unused so put it to the lowest freq we can */ | 387 | /* FCLK is unused so put it to the lowest freq we can */ |
426 | CGU_PROC = ((0xf << 4) | (0x3 << 2) | AS3525_CLK_MAIN); | 388 | CGU_PROC = ((0xf << 4) | (0x3 << 2) | AS3525_CLK_MAIN); |
427 | 389 | ||
428 | #if defined(HAVE_ADJUSTABLE_CPU_VOLTAGE) && (CPUFREQ_MAX > 200000000) | 390 | #ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE |
429 | /* Decreasing frequency so reduce voltage after change */ | 391 | /* Decreasing frequency so reduce voltage after change */ |
430 | ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_10)); | 392 | ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_10)); |
431 | #endif /* HAVE_ADJUSTABLE_CPU_VOLTAGE */ | 393 | #endif /* HAVE_ADJUSTABLE_CPU_VOLTAGE */ |