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author | Rafaël Carré <rafael.carre@gmail.com> | 2010-09-05 15:34:34 +0000 |
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committer | Rafaël Carré <rafael.carre@gmail.com> | 2010-09-05 15:34:34 +0000 |
commit | c196da2ceeddfc03a42e6a620aa08e3f583c8f0d (patch) | |
tree | 93fc7d4214af51ae689d02754a7192b36d94abe9 /firmware/target/arm/as3525/system-as3525.c | |
parent | d71d537b17f8a3cf385a6523b4d22458831a4afe (diff) | |
download | rockbox-c196da2ceeddfc03a42e6a620aa08e3f583c8f0d.tar.gz rockbox-c196da2ceeddfc03a42e6a620aa08e3f583c8f0d.zip |
FS#11597 : decrease FCLK frequency when unboosted
FCLK is unused because we use fastbus clocking: CPU clock = PCLK
Base PCLK off PLLA and use the lowest frqeuency for FCLK (24MHz source,
maximum divider)
Save a bit of power, adjust Clipv1/e200v2/Fuzev1 current usage accordingly
Note: the power saving (in mA) is a bit less on e200v2/Fuzev1 than on Clipv1
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28000 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/as3525/system-as3525.c')
-rw-r--r-- | firmware/target/arm/as3525/system-as3525.c | 18 |
1 files changed, 7 insertions, 11 deletions
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index 50ce697656..01534abb3c 100644 --- a/firmware/target/arm/as3525/system-as3525.c +++ b/firmware/target/arm/as3525/system-as3525.c | |||
@@ -262,11 +262,7 @@ void system_init(void) | |||
262 | #endif | 262 | #endif |
263 | AS3525_PCLK_SEL); | 263 | AS3525_PCLK_SEL); |
264 | 264 | ||
265 | #if CONFIG_CPU == AS3525 | 265 | set_cpu_frequency(CPUFREQ_DEFAULT); |
266 | cpu_frequency = CPUFREQ_DEFAULT; /* fastbus */ | ||
267 | #else | ||
268 | cpu_frequency = CPUFREQ_MAX; | ||
269 | #endif | ||
270 | 266 | ||
271 | #if 0 /* the GPIO clock is already enabled by the dualboot function */ | 267 | #if 0 /* the GPIO clock is already enabled by the dualboot function */ |
272 | CGU_PERI |= CGU_GPIO_CLOCK_ENABLE; | 268 | CGU_PERI |= CGU_GPIO_CLOCK_ENABLE; |
@@ -367,16 +363,14 @@ void set_cpu_frequency(long frequency) | |||
367 | while(adc_read(ADC_CVDD) < 470); /* 470 * .0025 = 1.175V */ | 363 | while(adc_read(ADC_CVDD) < 470); /* 470 * .0025 = 1.175V */ |
368 | #endif /* HAVE_ADJUSTABLE_CPU_VOLTAGE */ | 364 | #endif /* HAVE_ADJUSTABLE_CPU_VOLTAGE */ |
369 | 365 | ||
366 | CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | | ||
367 | (AS3525_FCLK_PREDIV << 2) | | ||
368 | AS3525_FCLK_SEL); | ||
369 | |||
370 | asm volatile( | 370 | asm volatile( |
371 | "mrc p15, 0, r0, c1, c0 \n" | 371 | "mrc p15, 0, r0, c1, c0 \n" |
372 | |||
373 | #ifdef ASYNCHRONOUS_BUS | ||
374 | "orr r0, r0, #3<<30 \n" /* asynchronous bus clocking */ | ||
375 | #else | ||
376 | "bic r0, r0, #3<<30 \n" /* clear bus bits */ | 372 | "bic r0, r0, #3<<30 \n" /* clear bus bits */ |
377 | "orr r0, r0, #1<<30 \n" /* synchronous bus clocking */ | 373 | "orr r0, r0, #1<<30 \n" /* synchronous bus clocking */ |
378 | #endif | ||
379 | |||
380 | "mcr p15, 0, r0, c1, c0 \n" | 374 | "mcr p15, 0, r0, c1, c0 \n" |
381 | : : : "r0" ); | 375 | : : : "r0" ); |
382 | 376 | ||
@@ -390,6 +384,8 @@ void set_cpu_frequency(long frequency) | |||
390 | "mcr p15, 0, r0, c1, c0 \n" | 384 | "mcr p15, 0, r0, c1, c0 \n" |
391 | : : : "r0" ); | 385 | : : : "r0" ); |
392 | 386 | ||
387 | /* FCLK is unused so put it to the lowest freq we can */ | ||
388 | CGU_PROC = ((0xf << 4) | (0x3 << 2) | AS3525_CLK_MAIN); | ||
393 | 389 | ||
394 | #ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE | 390 | #ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE |
395 | /* Decreasing frequency so reduce voltage after change */ | 391 | /* Decreasing frequency so reduce voltage after change */ |