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author | William Wilgus <me.theuser@yahoo.com> | 2018-07-27 23:56:32 +0200 |
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committer | William Wilgus <me.theuser@yahoo.com> | 2018-07-27 23:56:32 +0200 |
commit | 6f0320a9535bc1aa81d83fa879ac14d5ee603658 (patch) | |
tree | 3b12fc361595ecd2249f391e114036cb30150105 /firmware/target/arm/as3525/system-as3525.c | |
parent | 400603abdfb4ba7566e0cae8dbed9268f06716dc (diff) | |
download | rockbox-6f0320a9535bc1aa81d83fa879ac14d5ee603658.tar.gz rockbox-6f0320a9535bc1aa81d83fa879ac14d5ee603658.zip |
As3525 v1/v2 Add power savings menu
Allow user to select cpu undervolt
There have been quite a few issues across the SANSA AMS line related
to CPU undervolting while most players show greatly increased runtime
some crash.
Rather than constanly upping the voltage we now have a
setting with a safe value for all players and the option for lower voltages
I plan to add a few other options here later such as disk
timings and maybe some other clocks/experimental settings
Added: Disk Low speed option for AS3525v2 devices cuts
frequency to 12 MHz from 24 MHz
Added: Disk Low speed option for AS3525v1 devices cuts
frequency to 15.5 MHz from 31 MHz
Added: I2c Low Speed AS3525 devices, should be bigger improvement for v1 devices
Fixed: Debug menu for AS3525v2 No SDSLOT frequency,
Showed IDE freq though it is unused
Added: DBOP and SSP underclocking affects display on v1/v2 respectively
Fixed: debug menu now has SSP frequency, and SSP_CPSR
Update: made settings menu more generic
Update: cleaned up code
Added: Clip v1 & Fuze v1 didn't have HAVE_ADJUSTABLE_CPU_VOLTAGE.
not sure why but, waiting on testing to confirm
Added: C200v2 and E200v2 devices and HAVE_ADJUSTABLE_CPU_VOLTAGE.
Fixed: v1 devices don't like display timing set lower (dbop)
v1 devices don't have a divider set for ssp (causes divide by 0)
Fixed: ClipZip display lags with Max SSP divider changed from 0xFE to 0x32
Fixed: v1 devices didn't work properly with highspeed sd cards
Added code from http://gerrit.rockbox.org/r/#/c/1704/
Added powersave and IDE interface enable/disable
Added: V2 devices now have powersave enabled on sd interface
Update: cleaned up code, lang defines, added manual entries
Update ssp clock mechanism added calculated ssp divider to clipzip
Update turn display clock off when clip+ turns off display
Fixed: clipzip wrong register for SSP clock
Change-Id: I04137682243be92f0f8d8bf1cfa54fbb1965559b
TODO: add other players?
Diffstat (limited to 'firmware/target/arm/as3525/system-as3525.c')
-rw-r--r-- | firmware/target/arm/as3525/system-as3525.c | 70 |
1 files changed, 69 insertions, 1 deletions
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index d630ef38ec..c11c90f9f3 100644 --- a/firmware/target/arm/as3525/system-as3525.c +++ b/firmware/target/arm/as3525/system-as3525.c | |||
@@ -52,6 +52,29 @@ struct mutex cpufreq_mtx; | |||
52 | #define default_interrupt(name) \ | 52 | #define default_interrupt(name) \ |
53 | extern __attribute__((weak,alias("UIRQ"))) void name (void) | 53 | extern __attribute__((weak,alias("UIRQ"))) void name (void) |
54 | 54 | ||
55 | #ifdef CONFIG_POWER_SAVING | ||
56 | /* Powersave functions either manipulate the system directly | ||
57 | or pass enabled flag on to these specific functions | ||
58 | dis/enabling powersaving for the selected subsystem | ||
59 | */ | ||
60 | #if (CONFIG_POWER_SAVING & POWERSV_CPU) | ||
61 | /*cpu_set_powersave*/ | ||
62 | #include "settings.h" | ||
63 | #endif | ||
64 | #if (CONFIG_POWER_SAVING & POWERSV_DISP) | ||
65 | /*disp_set_powersave*/ | ||
66 | void ams_ssp_set_low_speed(bool slow); /*lcd-clip-plus.c & lcd-clipzip.c*/ | ||
67 | #endif | ||
68 | #if (CONFIG_POWER_SAVING & POWERSV_DISK) | ||
69 | /*disk_set_powersave*/ | ||
70 | void ams_sd_set_low_speed(bool slow); /* sd-as3525.c & sd-as3525v2.c */ | ||
71 | #endif | ||
72 | #if (CONFIG_POWER_SAVING & POWERSV_I2C) | ||
73 | /*i2c_set_powersave*/ | ||
74 | void ams_i2c_set_low_speed(bool slow); /* ascodec-as3525.c*/ | ||
75 | #endif | ||
76 | #endif /*CONFIG_POWER_SAVING*/ | ||
77 | |||
55 | #if CONFIG_USBOTG != USBOTG_DESIGNWARE | 78 | #if CONFIG_USBOTG != USBOTG_DESIGNWARE |
56 | static void UIRQ (void) __attribute__((interrupt ("IRQ"))); | 79 | static void UIRQ (void) __attribute__((interrupt ("IRQ"))); |
57 | #endif | 80 | #endif |
@@ -422,6 +445,39 @@ void udelay(unsigned usecs) | |||
422 | ); | 445 | ); |
423 | } | 446 | } |
424 | 447 | ||
448 | #ifdef CONFIG_POWER_SAVING | ||
449 | #if (CONFIG_POWER_SAVING & POWERSV_CPU) | ||
450 | void cpu_set_powersave(bool enabled) | ||
451 | { | ||
452 | /*global_settings.cpu_powersave*/ | ||
453 | /*handled in: set_cpu_frequency()*/ | ||
454 | (void) enabled; | ||
455 | } | ||
456 | #endif | ||
457 | #if (CONFIG_POWER_SAVING & POWERSV_DISK) | ||
458 | void disk_set_powersave(bool enabled) | ||
459 | { | ||
460 | /*global_settings.disk_powersave*/ | ||
461 | ams_sd_set_low_speed(enabled); | ||
462 | } | ||
463 | #endif | ||
464 | #if (CONFIG_POWER_SAVING & POWERSV_DISP) | ||
465 | void disp_set_powersave(bool enabled) | ||
466 | { | ||
467 | /*global_settings.disp_powersave*/ | ||
468 | ams_ssp_set_low_speed(enabled); | ||
469 | } | ||
470 | #endif | ||
471 | #if (CONFIG_POWER_SAVING & POWERSV_I2C) | ||
472 | void i2c_set_powersave(bool enabled) | ||
473 | { | ||
474 | /*global_settings.i2c_powersave*/ | ||
475 | ams_i2c_set_low_speed(enabled); | ||
476 | } | ||
477 | #endif | ||
478 | #endif /*defined(CONFIG_POWER_SAVING)*/ | ||
479 | |||
480 | |||
425 | #ifndef BOOTLOADER | 481 | #ifndef BOOTLOADER |
426 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ | 482 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ |
427 | bool set_cpu_frequency__lock(void) | 483 | bool set_cpu_frequency__lock(void) |
@@ -481,7 +537,12 @@ void set_cpu_frequency(long frequency) | |||
481 | CGU_PROC = ((0xf << 4) | (0x3 << 2) | AS3525_CLK_MAIN); | 537 | CGU_PROC = ((0xf << 4) | (0x3 << 2) | AS3525_CLK_MAIN); |
482 | 538 | ||
483 | #ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE | 539 | #ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE |
484 | /* Decreasing frequency so reduce voltage after change */ | 540 | /* Decreasing frequency so reduce voltage after change */ |
541 | #if defined(CONFIG_POWER_SAVING) && (CONFIG_POWER_SAVING & POWERSV_CPU) | ||
542 | if (!global_settings.cpu_powersave) | ||
543 | ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_15)); | ||
544 | else | ||
545 | #endif | ||
485 | ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_10)); | 546 | ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_10)); |
486 | #endif /* HAVE_ADJUSTABLE_CPU_VOLTAGE */ | 547 | #endif /* HAVE_ADJUSTABLE_CPU_VOLTAGE */ |
487 | 548 | ||
@@ -519,6 +580,13 @@ void set_cpu_frequency(long frequency) | |||
519 | 580 | ||
520 | /* Set CVDD1 power supply */ | 581 | /* Set CVDD1 power supply */ |
521 | #ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE | 582 | #ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE |
583 | #if defined(CONFIG_POWER_SAVING) && (CONFIG_POWER_SAVING & POWERSV_CPU) | ||
584 | if (!global_settings.cpu_powersave) | ||
585 | { | ||
586 | ascodec_write_pmu(0x17, 1, 0x80 | 26); | ||
587 | return; | ||
588 | } | ||
589 | #endif | ||
522 | #if defined(SANSA_CLIPZIP) | 590 | #if defined(SANSA_CLIPZIP) |
523 | ascodec_write_pmu(0x17, 1, 0x80 | 20); | 591 | ascodec_write_pmu(0x17, 1, 0x80 | 20); |
524 | #elif defined(SANSA_CLIPPLUS) | 592 | #elif defined(SANSA_CLIPPLUS) |