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author | Fred Bauer <fred.w.bauer@gmail.com> | 2010-12-14 22:08:43 +0000 |
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committer | Fred Bauer <fred.w.bauer@gmail.com> | 2010-12-14 22:08:43 +0000 |
commit | 279dff1c21c17e6598c8597a7987ded0e526269c (patch) | |
tree | ec297e17341ede39beb3ae6eef39e3beaca0bfe5 /firmware/target/arm/as3525/system-as3525.c | |
parent | 990cbf302eb04f80174c50040492fa7db6fbad6d (diff) | |
download | rockbox-279dff1c21c17e6598c8597a7987ded0e526269c.tar.gz rockbox-279dff1c21c17e6598c8597a7987ded0e526269c.zip |
FS#11765: Improve AMSv1 Battery Life by Lowering CPU and Peripheral clocks. Unboosted CPU and peripheral clock is now 31MHz. Boosted CPU and pclk are 186MHz and 62MHz, respectively.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28834 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/as3525/system-as3525.c')
-rw-r--r-- | firmware/target/arm/as3525/system-as3525.c | 42 |
1 files changed, 40 insertions, 2 deletions
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index d8059715d0..2c4543fa33 100644 --- a/firmware/target/arm/as3525/system-as3525.c +++ b/firmware/target/arm/as3525/system-as3525.c | |||
@@ -33,6 +33,12 @@ | |||
33 | #include "backlight-target.h" | 33 | #include "backlight-target.h" |
34 | #include "lcd.h" | 34 | #include "lcd.h" |
35 | 35 | ||
36 | /* FIXME */ | ||
37 | #define I2C2_CPSR0 *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x1C)) | ||
38 | #define I2C2_CPSR1 *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x20)) | ||
39 | extern void sd_set_boosted_divider(void); | ||
40 | extern void sd_set_unboosted_divider(void); | ||
41 | |||
36 | #define default_interrupt(name) \ | 42 | #define default_interrupt(name) \ |
37 | extern __attribute__((weak,alias("UIRQ"))) void name (void) | 43 | extern __attribute__((weak,alias("UIRQ"))) void name (void) |
38 | 44 | ||
@@ -286,7 +292,12 @@ void system_init(void) | |||
286 | #endif | 292 | #endif |
287 | 293 | ||
288 | /* Initialize power management settings */ | 294 | /* Initialize power management settings */ |
295 | #if CONFIG_CPU == AS3525 | ||
296 | ascodec_write(AS3514_CVDD_DCDC3, AS314_CP_DCDC3_SETTING|CVDD_1_10); | ||
297 | #else | ||
289 | ascodec_write(AS3514_CVDD_DCDC3, AS314_CP_DCDC3_SETTING); | 298 | ascodec_write(AS3514_CVDD_DCDC3, AS314_CP_DCDC3_SETTING); |
299 | #endif | ||
300 | |||
290 | #if CONFIG_TUNER | 301 | #if CONFIG_TUNER |
291 | fmradio_i2c_init(); | 302 | fmradio_i2c_init(); |
292 | #endif | 303 | #endif |
@@ -354,7 +365,9 @@ void set_cpu_frequency(long frequency) | |||
354 | { | 365 | { |
355 | if(frequency == CPUFREQ_MAX) | 366 | if(frequency == CPUFREQ_MAX) |
356 | { | 367 | { |
357 | #ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE | 368 | #if defined(HAVE_ADJUSTABLE_CPU_VOLTAGE) && (CPUFREQ_MAX > 200000000) |
369 | /* This doesn't work anymore. It was written before ascodec | ||
370 | was switched to use interrupts */ | ||
358 | /* Increasing frequency so boost voltage before change */ | 371 | /* Increasing frequency so boost voltage before change */ |
359 | ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_20)); | 372 | ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_20)); |
360 | 373 | ||
@@ -374,10 +387,35 @@ void set_cpu_frequency(long frequency) | |||
374 | "mcr p15, 0, r0, c1, c0 \n" | 387 | "mcr p15, 0, r0, c1, c0 \n" |
375 | : : : "r0" ); | 388 | : : : "r0" ); |
376 | 389 | ||
390 | #ifdef HAVE_MULTIDRIVE | ||
391 | /* Set uSD frequency */ | ||
392 | sd_set_boosted_divider(); | ||
393 | #endif | ||
394 | /* Set I2C frequency */ | ||
395 | I2C2_CPSR0 = AS3525_I2C_PRESCALER_BOOSTED & 0xFF; /* 8 lsb */ | ||
396 | I2C2_CPSR1 = (AS3525_I2C_PRESCALER_BOOSTED >> 8) & 0x3; /* 2 msb */ | ||
397 | /* Set PCLK frequency */ | ||
398 | CGU_PERI = ((CGU_PERI & ~0x7F) | /* reset divider & clksel bits */ | ||
399 | (AS3525_PCLK_DIV0_BOOSTED << 2) | | ||
400 | (AS3525_PCLK_DIV1_BOOSTED << 6) | | ||
401 | AS3525_PCLK_SEL); | ||
377 | cpu_frequency = CPUFREQ_MAX; | 402 | cpu_frequency = CPUFREQ_MAX; |
378 | } | 403 | } |
379 | else | 404 | else |
380 | { | 405 | { |
406 | /* Set I2C frequency */ | ||
407 | I2C2_CPSR0 = AS3525_I2C_PRESCALER & 0xFF; /* 8 lsb */ | ||
408 | I2C2_CPSR1 = (AS3525_I2C_PRESCALER >> 8) & 0x3; /* 2 msb */ | ||
409 | /* Set PCLK frequency */ | ||
410 | CGU_PERI = ((CGU_PERI & ~0x7F) | /* reset divider & clksel bits */ | ||
411 | (AS3525_PCLK_DIV0 << 2) | | ||
412 | (AS3525_PCLK_DIV1 << 6) | | ||
413 | AS3525_PCLK_SEL); | ||
414 | |||
415 | #ifdef HAVE_MULTIDRIVE | ||
416 | /* Set uSD frequency */ | ||
417 | sd_set_unboosted_divider(); | ||
418 | #endif | ||
381 | asm volatile( | 419 | asm volatile( |
382 | "mrc p15, 0, r0, c1, c0 \n" | 420 | "mrc p15, 0, r0, c1, c0 \n" |
383 | "bic r0, r0, #3<<30 \n" /* fastbus clocking */ | 421 | "bic r0, r0, #3<<30 \n" /* fastbus clocking */ |
@@ -387,7 +425,7 @@ void set_cpu_frequency(long frequency) | |||
387 | /* FCLK is unused so put it to the lowest freq we can */ | 425 | /* FCLK is unused so put it to the lowest freq we can */ |
388 | CGU_PROC = ((0xf << 4) | (0x3 << 2) | AS3525_CLK_MAIN); | 426 | CGU_PROC = ((0xf << 4) | (0x3 << 2) | AS3525_CLK_MAIN); |
389 | 427 | ||
390 | #ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE | 428 | #if defined(HAVE_ADJUSTABLE_CPU_VOLTAGE) && (CPUFREQ_MAX > 200000000) |
391 | /* Decreasing frequency so reduce voltage after change */ | 429 | /* Decreasing frequency so reduce voltage after change */ |
392 | ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_10)); | 430 | ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_10)); |
393 | #endif /* HAVE_ADJUSTABLE_CPU_VOLTAGE */ | 431 | #endif /* HAVE_ADJUSTABLE_CPU_VOLTAGE */ |