diff options
author | Rafaël Carré <rafael.carre@gmail.com> | 2009-06-08 23:05:33 +0000 |
---|---|---|
committer | Rafaël Carré <rafael.carre@gmail.com> | 2009-06-08 23:05:33 +0000 |
commit | f5041538574c039b07c4db8d261bd33ec0f3bab0 (patch) | |
tree | d4fc2f48c7209e3303b5c48abc211e3a961a7dac /firmware/target/arm/as3525/pcm-as3525.c | |
parent | 20a78a36f36967651032ab10b4ee31412e37b69d (diff) | |
download | rockbox-f5041538574c039b07c4db8d261bd33ec0f3bab0.tar.gz rockbox-f5041538574c039b07c4db8d261bd33ec0f3bab0.zip |
FS#10048 : enable MMU and data cache on Sansa AMS to give a major speed up
- cache IRAM and DRAM
- map IRAM just next to DRAM to remove the need for -mlong-calls and reduce binsize
- tweak delays in Fuze button code
- tweak delays in Clip button code (down button sometimes doesn't respond anyway : an alternate driver is being worked on)
Before reporting any problem, please check your filesystem or format your player from the OF
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21228 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/as3525/pcm-as3525.c')
-rw-r--r-- | firmware/target/arm/as3525/pcm-as3525.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/firmware/target/arm/as3525/pcm-as3525.c b/firmware/target/arm/as3525/pcm-as3525.c index 5074941f4a..4f9e18523d 100644 --- a/firmware/target/arm/as3525/pcm-as3525.c +++ b/firmware/target/arm/as3525/pcm-as3525.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include "panic.h" | 28 | #include "panic.h" |
29 | #include "as3514.h" | 29 | #include "as3514.h" |
30 | #include "audiohw.h" | 30 | #include "audiohw.h" |
31 | #include "mmu-arm.h" | ||
31 | 32 | ||
32 | #define MAX_TRANSFER (4*((1<<11)-1)) /* maximum data we can transfer via DMA | 33 | #define MAX_TRANSFER (4*((1<<11)-1)) /* maximum data we can transfer via DMA |
33 | * i.e. 32 bits at once (size of I2SO_DATA) | 34 | * i.e. 32 bits at once (size of I2SO_DATA) |
@@ -69,6 +70,7 @@ static void play_start_pcm(void) | |||
69 | CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE; | 70 | CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE; |
70 | CGU_AUDIO |= (1<<11); | 71 | CGU_AUDIO |= (1<<11); |
71 | 72 | ||
73 | clean_dcache_range((void*)addr, size); /* force write back */ | ||
72 | dma_enable_channel(1, (void*)addr, (void*)I2SOUT_DATA, DMA_PERI_I2SOUT, | 74 | dma_enable_channel(1, (void*)addr, (void*)I2SOUT_DATA, DMA_PERI_I2SOUT, |
73 | DMAC_FLOWCTRL_DMAC_MEM_TO_PERI, true, false, size >> 2, DMA_S1, | 75 | DMAC_FLOWCTRL_DMAC_MEM_TO_PERI, true, false, size >> 2, DMA_S1, |
74 | dma_callback); | 76 | dma_callback); |
@@ -164,6 +166,15 @@ const void * pcm_play_dma_get_peak_buffer(int *count) | |||
164 | return (const void*)dma_start_addr; | 166 | return (const void*)dma_start_addr; |
165 | } | 167 | } |
166 | 168 | ||
169 | #ifdef HAVE_PCM_DMA_ADDRESS | ||
170 | void * pcm_dma_addr(void *addr) | ||
171 | { | ||
172 | if (addr != NULL) | ||
173 | addr = UNCACHED_ADDR(addr); | ||
174 | return addr; | ||
175 | } | ||
176 | #endif | ||
177 | |||
167 | 178 | ||
168 | /**************************************************************************** | 179 | /**************************************************************************** |
169 | ** Recording DMA transfer | 180 | ** Recording DMA transfer |