Sansa AMS: Assume IDE_CLK is used as MCLK for internal SD. We assumed PCLK previously.

This patch changes all references/assumptions of PCLK to IDE_CLK for the internal pl180 controller.
Lower the AS3525_IDE_FREQ to 50 MHz in order to be able to divide by 2 for 25 MHz on the internal SD card.
Adjust the code in debug-as3525.c to account for the change and the frequencies reported should be correct.
Add some #if defined(HAVE_MULTIDRIVE) conditionals to cut out the code dealing with uSD for the clip.
Isolate the write delay needed for low frequency writes to only run for standard speed uSD cards. That is the only case for an MCICLK at 15.5 MHz.

Internal cards run at 25 MHz, HS uSD at 31 MHz, and standard speed uSD cards at 15.5 MHz.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23929 a1c6a512-1295-4272-9138-f99709370657

1 files changed, 3 insertions, 3 deletions

diff --git a/firmware/target/arm/as3525/debug-as3525.c b/firmware/target/arm/as3525/debug-as3525.c
index 2606f68e82..f8f183d432 100644
--- a/firmware/target/arm/as3525/debug-as3525.c
+++ b/firmware/target/arm/as3525/debug-as3525.c
@@ -185,9 +185,9 @@ int calc_freq(int clk)
             if(!(MCI_NAND & (1<<8)))
                 return 0;
             else if(MCI_NAND & (1<<10))
-                return calc_freq(CLK_PCLK);
+                return calc_freq(CLK_IDE);
             else
-                return calc_freq(CLK_PCLK)/(((MCI_NAND & 0xff)+1)*2);
+                return calc_freq(CLK_IDE)/(((MCI_NAND & 0xff)+1)*2);
         case CLK_SD_MCLK_MSD:
             if(!(MCI_SD & (1<<8)))
                 return 0;
@@ -304,7 +304,7 @@ bool __dbg_hw_info(void)
         }
 
         lcd_putsf(0, line++, "SD  :%3dMHz    %3dMHz",
-            ((AS3525_PCLK_FREQ/ 1000000) /
+            ((AS3525_IDE_FREQ/ 1000000) /
             ((last_nand & MCI_CLOCK_BYPASS)? 1:(((last_nand & 0xff)+1) * 2))),
             calc_freq(CLK_SD_MCLK_NAND)/1000000);
 #ifdef HAVE_MULTIDRIVE