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authorMark Arigo <markarigo@gmail.com>2008-12-12 04:56:25 +0000
committerMark Arigo <markarigo@gmail.com>2008-12-12 04:56:25 +0000
commit08585e417b4e545752ff9478d28c4da3e8c09844 (patch)
tree313471fd029dcd6fb3acad417a8fa88dc2644ed8 /firmware/target/arm/adc-pp5020.c
parentea5d0bd7ec036eb8a34afe1d339b3233d281db57 (diff)
downloadrockbox-08585e417b4e545752ff9478d28c4da3e8c09844.tar.gz
rockbox-08585e417b4e545752ff9478d28c4da3e8c09844.zip
FS#9591 by Anton Veretenenko for the Philips GoGear HDD1620/1630 (with a few changes by me). Fixes boot problem, pixel format, sound, and a few other things.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19395 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/adc-pp5020.c')
-rw-r--r--firmware/target/arm/adc-pp5020.c22
1 files changed, 12 insertions, 10 deletions
diff --git a/firmware/target/arm/adc-pp5020.c b/firmware/target/arm/adc-pp5020.c
index a8fe8c1560..33950014dc 100644
--- a/firmware/target/arm/adc-pp5020.c
+++ b/firmware/target/arm/adc-pp5020.c
@@ -35,28 +35,28 @@ unsigned short adc_scan(int channel)
35 35
36 /* Start conversion */ 36 /* Start conversion */
37 ADC_ADDR |= 0x80000000; 37 ADC_ADDR |= 0x80000000;
38 38
39 /* Wait for conversion to complete */ 39 /* Wait for conversion to complete */
40 while((ADC_STATUS & (0x40<<8*channel))==0); 40 while((ADC_STATUS & (0x40<<8*channel))==0);
41 41
42 /* Stop conversion */ 42 /* Stop conversion */
43 ADC_ADDR &=~ 0x80000000; 43 ADC_ADDR &=~ 0x80000000;
44 44
45 /* ADC_DATA_1 and ADC_DATA_2 are both four bytes, one byte per channel. 45 /* ADC_DATA_1 and ADC_DATA_2 are both four bytes, one byte per channel.
46 For each channel, ADC_DATA_1 stores the 8-bit msb, ADC_DATA_2 stores the 46 For each channel, ADC_DATA_1 stores the 8-bit msb, ADC_DATA_2 stores the
47 2-bit lsb (in bits 0 and 1). Each channel is 10 bits total. */ 47 2-bit lsb (in bits 0 and 1). Each channel is 10 bits total. */
48 adc_data_1 = ((ADC_DATA_1 >> (8*channel)) & 0xff); 48 adc_data_1 = ((ADC_DATA_1 >> (8*channel)) & 0xff);
49 adc_data_2 = ((ADC_DATA_2 >> (8*channel+6)) & 0x3); 49 adc_data_2 = ((ADC_DATA_2 >> (8*channel+6)) & 0x3);
50 50
51 adcdata[channel] = (adc_data_1<<2 | adc_data_2); 51 adcdata[channel] = (adc_data_1<<2 | adc_data_2);
52 52
53 /* ADC values read low if PLL is enabled */ 53 /* ADC values read low if PLL is enabled */
54 if(PLL_CONTROL & 0x80000000){ 54 if(PLL_CONTROL & 0x80000000){
55 adcdata[channel] += 0x14; 55 adcdata[channel] += 0x14;
56 if(adcdata[channel] > 0x400) 56 if(adcdata[channel] > 0x400)
57 adcdata[channel] = 0x400; 57 adcdata[channel] = 0x400;
58 } 58 }
59 59
60 return adcdata[channel]; 60 return adcdata[channel];
61} 61}
62 62
@@ -83,17 +83,18 @@ static void adc_tick(void)
83/* Figured out from how the OF does things */ 83/* Figured out from how the OF does things */
84void adc_init(void) 84void adc_init(void)
85{ 85{
86
86 ADC_INIT |= 1; 87 ADC_INIT |= 1;
87 ADC_INIT |= 0x40000000; 88 ADC_INIT |= 0x40000000;
88 udelay(100); 89 udelay(100);
89 90
90 /* Reset ADC */ 91 /* Reset ADC */
91 DEV_RS2 |= 0x20; 92 DEV_RS2 |= 0x20;
92 udelay(100); 93 udelay(100);
93 94
94 DEV_RS2 &=~ 0x20; 95 DEV_RS2 &=~ 0x20;
95 udelay(100); 96 udelay(100);
96 97
97 /* Enable ADC */ 98 /* Enable ADC */
98 DEV_EN2 |= 0x20; 99 DEV_EN2 |= 0x20;
99 udelay(100); 100 udelay(100);
@@ -121,7 +122,8 @@ void adc_init(void)
121 ADC_ADDR |= 0x2000000; 122 ADC_ADDR |= 0x2000000;
122 ADC_STATUS |= 0x2000; 123 ADC_STATUS |= 0x2000;
123 124
124#if defined (IRIVER_H10) || defined(IRIVER_H10_5GB) || defined(MROBE_100) 125#if defined (IRIVER_H10) || defined(IRIVER_H10_5GB) || \
126 defined(MROBE_100) || defined(PHILIPS_HDD1630)
125 /* Enable channel 2 (H10:remote) */ 127 /* Enable channel 2 (H10:remote) */
126 DEV_INIT1 &=~0x300; 128 DEV_INIT1 &=~0x300;
127 DEV_INIT1 |= 0x100; 129 DEV_INIT1 |= 0x100;