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author | Rafaël Carré <rafael.carre@gmail.com> | 2010-05-15 19:44:54 +0000 |
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committer | Rafaël Carré <rafael.carre@gmail.com> | 2010-05-15 19:44:54 +0000 |
commit | 6f6dffa4a6511b2054c3f65ff37fe07f196429ea (patch) | |
tree | e7c9cea20e05e2b2e8b5a47f119a55966e4ff9c2 /firmware/target/arm/adc-as3514.c | |
parent | f6a17bdbd4cd007ad89285624e5a53d7b9d819d0 (diff) | |
download | rockbox-6f6dffa4a6511b2054c3f65ff37fe07f196429ea.tar.gz rockbox-6f6dffa4a6511b2054c3f65ff37fe07f196429ea.zip |
adc-as3514.c: cosmetics
reduce indentation level, return early on error condition
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26063 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/adc-as3514.c')
-rw-r--r-- | firmware/target/arm/adc-as3514.c | 48 |
1 files changed, 24 insertions, 24 deletions
diff --git a/firmware/target/arm/adc-as3514.c b/firmware/target/arm/adc-as3514.c index 77d65455fb..8c661eb133 100644 --- a/firmware/target/arm/adc-as3514.c +++ b/firmware/target/arm/adc-as3514.c | |||
@@ -28,36 +28,36 @@ unsigned short adc_read(int channel) | |||
28 | { | 28 | { |
29 | unsigned short data = 0; | 29 | unsigned short data = 0; |
30 | 30 | ||
31 | if ((unsigned)channel < NUM_ADC_CHANNELS) | 31 | if ((unsigned)channel >= NUM_ADC_CHANNELS) |
32 | { | 32 | return 0; |
33 | ascodec_lock(); | ||
34 | 33 | ||
35 | /* Select channel */ | 34 | ascodec_lock(); |
36 | if (ascodec_write(AS3514_ADC_0, (channel << 4)) >= 0) | ||
37 | { | ||
38 | unsigned char buf[2]; | ||
39 | 35 | ||
40 | /* | 36 | /* Select channel */ |
41 | * The AS3514 ADC will trigger an interrupt when the conversion | 37 | if (ascodec_write(AS3514_ADC_0, (channel << 4)) >= 0) |
42 | * is finished, if the corresponding enable bit in IRQ_ENRD2 | 38 | { |
43 | * is set. | 39 | unsigned char buf[2]; |
44 | * Previously the code did not wait and this apparently did | ||
45 | * not pose any problems, but this should be more correct. | ||
46 | * Without the wait the data read back may be completely or | ||
47 | * partially (first one of the two bytes) stale. | ||
48 | */ | ||
49 | ascodec_wait_adc_finished(); | ||
50 | 40 | ||
41 | /* | ||
42 | * The AS3514 ADC will trigger an interrupt when the conversion | ||
43 | * is finished, if the corresponding enable bit in IRQ_ENRD2 | ||
44 | * is set. | ||
45 | * Previously the code did not wait and this apparently did | ||
46 | * not pose any problems, but this should be more correct. | ||
47 | * Without the wait the data read back may be completely or | ||
48 | * partially (first one of the two bytes) stale. | ||
49 | */ | ||
50 | ascodec_wait_adc_finished(); | ||
51 | 51 | ||
52 | /* Read data */ | ||
53 | if (ascodec_readbytes(AS3514_ADC_0, 2, buf) >= 0) | ||
54 | { | ||
55 | data = (((buf[0] & 0x3) << 8) | buf[1]); | ||
56 | } | ||
57 | } | ||
58 | 52 | ||
59 | ascodec_unlock(); | 53 | /* Read data */ |
54 | if (ascodec_readbytes(AS3514_ADC_0, 2, buf) >= 0) | ||
55 | { | ||
56 | data = (((buf[0] & 0x3) << 8) | buf[1]); | ||
57 | } | ||
60 | } | 58 | } |
59 | |||
60 | ascodec_unlock(); | ||
61 | 61 | ||
62 | return data; | 62 | return data; |
63 | } | 63 | } |