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authorThom Johansen <thomj@rockbox.org>2006-03-17 02:02:13 +0000
committerThom Johansen <thomj@rockbox.org>2006-03-17 02:02:13 +0000
commitf6e856774c681d3c189dd6753fc041583f36866c (patch)
treee924dfe7d954ee90512ef9321da42cccf8ab3489 /firmware/system.c
parent4ba14d91135f75e98987887679b7b3d6bccb3120 (diff)
downloadrockbox-f6e856774c681d3c189dd6753fc041583f36866c.tar.gz
rockbox-f6e856774c681d3c189dd6753fc041583f36866c.zip
CPU boosting support for ipod nano and video. The rest of the targets
are either untested or do not work with the current code. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@9070 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/system.c')
-rw-r--r--firmware/system.c54
1 files changed, 45 insertions, 9 deletions
diff --git a/firmware/system.c b/firmware/system.c
index 63cdf0a144..b432cde79a 100644
--- a/firmware/system.c
+++ b/firmware/system.c
@@ -1200,21 +1200,55 @@ static void ipod_init_cache(void)
1200 inb(i); 1200 inb(i);
1201} 1201}
1202 1202
1203static void ipod_set_cpu_speed(void) 1203/* Only these two support CPU boosting at the moment */
1204#if defined(APPLE_IPODNANO) || defined(APPLE_IPODVIDEO)
1205void set_cpu_frequency(long frequency)
1204{ 1206{
1205 outl(inl(0x70000020) | (1<<30), 0x70000020); 1207 unsigned long postmult;
1208
1209 if (frequency == CPUFREQ_NORMAL)
1210 postmult = CPUFREQ_NORMAL_MULT;
1211 else if (frequency == CPUFREQ_MAX)
1212 postmult = CPUFREQ_MAX_MULT;
1213 else
1214 postmult = CPUFREQ_DEFAULT_MULT;
1215 cpu_frequency = frequency;
1206 1216
1207 /* Set run state to 24MHz */ 1217 /* Enable PLL? */
1218 outl(inl(0x70000020) | (1<<30), 0x70000020);
1219
1220 /* Select 24MHz crystal as clock source? */
1208 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020); 1221 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020);
1209 1222
1210 /* 75 MHz (24/8)*25 */ 1223 /* Clock frequency = (24/8)*postmult */
1211 outl(0xaa021908, 0x60006034); 1224 outl(0xaa020000 | 8 | (postmult << 8), 0x60006034);
1212 udelay(2000); 1225 /* Wait for PLL relock? */
1226 udelay(2000);
1213 1227
1214 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020); 1228 /* Select PLL as clock source? */
1229 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020);
1230}
1231#else
1232void ipod_set_cpu_frequency(void)
1233{
1234 /* Enable PLL? */
1235 outl(inl(0x70000020) | (1<<30), 0x70000020);
1236
1237 /* Select 24MHz crystal as clock source? */
1238 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020);
1239
1240 /* Clock frequency = (24/8)*25 = 75MHz */
1241 outl(0xaa020000 | 8 | (25 << 8), 0x60006034);
1242 /* Wait for PLL relock? */
1243 udelay(2000);
1244
1245 /* Select PLL as clock source? */
1246 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020);
1215} 1247}
1216#endif 1248#endif
1217 1249
1250#endif /* BOOTLOADER */
1251
1218void system_init(void) 1252void system_init(void)
1219{ 1253{
1220#ifndef BOOTLOADER 1254#ifndef BOOTLOADER
@@ -1230,8 +1264,10 @@ void system_init(void)
1230 outl(-1, 0x60001038); 1264 outl(-1, 0x60001038);
1231 outl(-1, 0x60001028); 1265 outl(-1, 0x60001028);
1232 outl(-1, 0x6000101c); 1266 outl(-1, 0x6000101c);
1233 ipod_set_cpu_speed(); 1267#if !defined(APPLE_IPODNANO) && !defined(APPLE_IPODVIDEO)
1234 ipod_init_cache(); 1268 ipod_set_cpu_frequency();
1269#endif
1270 ipod_init_cache();
1235#endif 1271#endif
1236} 1272}
1237 1273