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authorMichael Sevakis <jethead71@rockbox.org>2006-10-30 14:17:14 +0000
committerMichael Sevakis <jethead71@rockbox.org>2006-10-30 14:17:14 +0000
commitf29cae0d26e21e35f71845b6726aca3b81aa6a77 (patch)
tree5ef4ebf5356e0266ec5769d21a380bc1164d61f4 /firmware/system.c
parent522da3a67723ea8fe1a3b640272da298771f2cd8 (diff)
downloadrockbox-f29cae0d26e21e35f71845b6726aca3b81aa6a77.tar.gz
rockbox-f29cae0d26e21e35f71845b6726aca3b81aa6a77.zip
Moved coldfire code in system.c and system.h into target tree.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11399 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/system.c')
-rw-r--r--firmware/system.c280
1 files changed, 1 insertions, 279 deletions
diff --git a/firmware/system.c b/firmware/system.c
index 4dbc41b515..242d84d16c 100644
--- a/firmware/system.c
+++ b/firmware/system.c
@@ -391,285 +391,7 @@ int system_memory_guard(int newmode)
391 return 0; 391 return 0;
392} 392}
393#elif defined(CPU_COLDFIRE) 393#elif defined(CPU_COLDFIRE)
394#include "pcf50606.h" 394/* system code is in target tree for all coldfire targets */
395
396#define default_interrupt(name) \
397 extern __attribute__((weak,alias("UIE"))) void name (void)
398
399static const char* const irqname[] = {
400 "", "", "AccessErr","AddrErr","IllInstr", "", "","",
401 "PrivVio","Trace","Line-A", "Line-F","Debug","","FormErr","Uninit",
402 "","","","","","","","",
403 "Spurious","Level1","Level2","Level3","Level4","Level5","Level6","Level7",
404 "Trap0","Trap1","Trap2","Trap3","Trap4","Trap5","Trap6","Trap7",
405 "Trap8","Trap9","Trap10","Trap11","Trap12","Trap13","Trap14","Trap15",
406 "SWT","Timer0","Timer1","I2C","UART1","UART2","DMA0","DMA1",
407 "DMA2","DMA3","QSPI","","","","","",
408 "PDIR1FULL","PDIR2FULL","EBUTXEMPTY","IIS2TXEMPTY",
409 "IIS1TXEMPTY","PDIR3FULL","PDIR3RESYN","UQ2CHANERR",
410 "AUDIOTICK","PDIR2RESYN","PDIR2UNOV","PDIR1RESYN",
411 "PDIR1UNOV","UQ1CHANERR","IEC2BUFATTEN","IEC2PARERR",
412 "IEC2VALNOGOOD","IEC2CNEW","IEC1BUFATTEN","UCHANTXNF",
413 "UCHANTXUNDER","UCHANTXEMPTY","PDIR3UNOV","IEC1PARERR",
414 "IEC1VALNOGOOD","IEC1CNEW","EBUTXRESYN","EBUTXUNOV",
415 "IIS2TXRESYN","IIS2TXUNOV","IIS1TXRESYN","IIS1TXUNOV",
416 "GPI0","GPI1","GPI2","GPI3","GPI4","GPI5","GPI6","GPI7",
417 "","","","","","","","SOFTINT0",
418 "SOFTINT1","SOFTINT2","SOFTINT3","",
419 "","CDROMCRCERR","CDROMNOSYNC","CDROMILSYNC",
420 "CDROMNEWBLK","","","","","","","",
421 "","","","","","","","",
422 "","","","","","","","",
423 "","","","","","","","",
424 "","","","","","","","",
425 "","","","","","","","",
426 "","","","","","","","",
427 "","","","","","","","",
428 "","","","","","","",""
429};
430
431default_interrupt (TRAP0); /* Trap #0 */
432default_interrupt (TRAP1); /* Trap #1 */
433default_interrupt (TRAP2); /* Trap #2 */
434default_interrupt (TRAP3); /* Trap #3 */
435default_interrupt (TRAP4); /* Trap #4 */
436default_interrupt (TRAP5); /* Trap #5 */
437default_interrupt (TRAP6); /* Trap #6 */
438default_interrupt (TRAP7); /* Trap #7 */
439default_interrupt (TRAP8); /* Trap #8 */
440default_interrupt (TRAP9); /* Trap #9 */
441default_interrupt (TRAP10); /* Trap #10 */
442default_interrupt (TRAP11); /* Trap #11 */
443default_interrupt (TRAP12); /* Trap #12 */
444default_interrupt (TRAP13); /* Trap #13 */
445default_interrupt (TRAP14); /* Trap #14 */
446default_interrupt (TRAP15); /* Trap #15 */
447default_interrupt (SWT); /* Software Watchdog Timer */
448default_interrupt (TIMER0); /* Timer 0 */
449default_interrupt (TIMER1); /* Timer 1 */
450default_interrupt (I2C); /* I2C */
451default_interrupt (UART1); /* UART 1 */
452default_interrupt (UART2); /* UART 2 */
453default_interrupt (DMA0); /* DMA 0 */
454default_interrupt (DMA1); /* DMA 1 */
455default_interrupt (DMA2); /* DMA 2 */
456default_interrupt (DMA3); /* DMA 3 */
457default_interrupt (QSPI); /* QSPI */
458
459default_interrupt (PDIR1FULL); /* Processor data in 1 full */
460default_interrupt (PDIR2FULL); /* Processor data in 2 full */
461default_interrupt (EBUTXEMPTY); /* EBU transmit FIFO empty */
462default_interrupt (IIS2TXEMPTY); /* IIS2 transmit FIFO empty */
463default_interrupt (IIS1TXEMPTY); /* IIS1 transmit FIFO empty */
464default_interrupt (PDIR3FULL); /* Processor data in 3 full */
465default_interrupt (PDIR3RESYN); /* Processor data in 3 resync */
466default_interrupt (UQ2CHANERR); /* IEC958-2 Rx U/Q channel error */
467default_interrupt (AUDIOTICK); /* "tick" interrupt */
468default_interrupt (PDIR2RESYN); /* Processor data in 2 resync */
469default_interrupt (PDIR2UNOV); /* Processor data in 2 under/overrun */
470default_interrupt (PDIR1RESYN); /* Processor data in 1 resync */
471default_interrupt (PDIR1UNOV); /* Processor data in 1 under/overrun */
472default_interrupt (UQ1CHANERR); /* IEC958-1 Rx U/Q channel error */
473default_interrupt (IEC2BUFATTEN);/* IEC958-2 channel buffer full */
474default_interrupt (IEC2PARERR); /* IEC958-2 Rx parity or symbol error */
475default_interrupt (IEC2VALNOGOOD);/* IEC958-2 flag not good */
476default_interrupt (IEC2CNEW); /* IEC958-2 New C-channel received */
477default_interrupt (IEC1BUFATTEN);/* IEC958-1 channel buffer full */
478default_interrupt (UCHANTXNF); /* U channel Tx reg next byte is first */
479default_interrupt (UCHANTXUNDER);/* U channel Tx reg underrun */
480default_interrupt (UCHANTXEMPTY);/* U channel Tx reg is empty */
481default_interrupt (PDIR3UNOV); /* Processor data in 3 under/overrun */
482default_interrupt (IEC1PARERR); /* IEC958-1 Rx parity or symbol error */
483default_interrupt (IEC1VALNOGOOD);/* IEC958-1 flag not good */
484default_interrupt (IEC1CNEW); /* IEC958-1 New C-channel received */
485default_interrupt (EBUTXRESYN); /* EBU Tx FIFO resync */
486default_interrupt (EBUTXUNOV); /* EBU Tx FIFO under/overrun */
487default_interrupt (IIS2TXRESYN); /* IIS2 Tx FIFO resync */
488default_interrupt (IIS2TXUNOV); /* IIS2 Tx FIFO under/overrun */
489default_interrupt (IIS1TXRESYN); /* IIS1 Tx FIFO resync */
490default_interrupt (IIS1TXUNOV); /* IIS1 Tx FIFO under/overrun */
491default_interrupt (GPI0); /* GPIO interrupt 0 */
492default_interrupt (GPI1); /* GPIO interrupt 1 */
493default_interrupt (GPI2); /* GPIO interrupt 2 */
494default_interrupt (GPI3); /* GPIO interrupt 3 */
495default_interrupt (GPI4); /* GPIO interrupt 4 */
496default_interrupt (GPI5); /* GPIO interrupt 5 */
497default_interrupt (GPI6); /* GPIO interrupt 6 */
498default_interrupt (GPI7); /* GPIO interrupt 7 */
499
500default_interrupt (SOFTINT0); /* Software interrupt 0 */
501default_interrupt (SOFTINT1); /* Software interrupt 1 */
502default_interrupt (SOFTINT2); /* Software interrupt 2 */
503default_interrupt (SOFTINT3); /* Software interrupt 3 */
504
505default_interrupt (CDROMCRCERR); /* CD-ROM CRC error */
506default_interrupt (CDROMNOSYNC); /* CD-ROM No sync */
507default_interrupt (CDROMILSYNC); /* CD-ROM Illegal sync */
508default_interrupt (CDROMNEWBLK); /* CD-ROM New block */
509
510void UIE (void) /* Unexpected Interrupt or Exception */
511{
512 unsigned int format_vector, pc;
513 int vector;
514 char str[32];
515
516 asm volatile ("move.l (52,%%sp),%0": "=r"(format_vector));
517 asm volatile ("move.l (56,%%sp),%0": "=r"(pc));
518
519 vector = (format_vector >> 18) & 0xff;
520
521 /* clear screen */
522 lcd_clear_display ();
523#ifdef HAVE_LCD_BITMAP
524 lcd_setfont(FONT_SYSFIXED);
525#endif
526 snprintf(str,sizeof(str),"I%02x:%s",vector,irqname[vector]);
527 lcd_puts(0,0,str);
528 snprintf(str,sizeof(str),"at %08x",pc);
529 lcd_puts(0,1,str);
530 lcd_update();
531
532 /* set cpu frequency to 11mhz (to prevent overheating) */
533 DCR = (DCR & ~0x01ff) | 1;
534 PLLCR = 0x10800000;
535
536 while (1)
537 {
538 /* check for the ON button (and !hold) */
539 if ((GPIO1_READ & 0x22) == 0)
540 SYPCR = 0xc0;
541 /* Start watchdog timer with 512 cycles timeout. Don't service it. */
542
543 /* We need a reset method that works in all cases. Calling system_reboot()
544 doesn't work when we're called from the debug interrupt, because then
545 the CPU is in emulator mode and the only ways leaving it are exexcuting
546 an rte instruction or performing a reset. Even disabling the breakpoint
547 logic and performing special rte magic doesn't make system_reboot()
548 reliable. The system restarts, but boot often fails with ata error -42. */
549 }
550}
551
552/* reset vectors are handled in crt0.S */
553void (* const vbr[]) (void) __attribute__ ((section (".vectors"))) =
554{
555 UIE,UIE,UIE,UIE,UIE,UIE,
556 UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,
557 UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,
558 UIE,UIE,UIE,TIMER0,TIMER1,UIE,UIE,UIE,
559 /* lvl 3 lvl 4 */
560
561 TRAP0,TRAP1,TRAP2,TRAP3,TRAP4,TRAP5,TRAP6,TRAP7,
562 TRAP8,TRAP9,TRAP10,TRAP11,TRAP12,TRAP13,TRAP14,TRAP15,
563
564 SWT,UIE,UIE,I2C,UART1,UART2,DMA0,DMA1,
565 DMA2,DMA3,QSPI,UIE,UIE,UIE,UIE,UIE,
566 PDIR1FULL,PDIR2FULL,EBUTXEMPTY,IIS2TXEMPTY,
567 IIS1TXEMPTY,PDIR3FULL,PDIR3RESYN,UQ2CHANERR,
568 AUDIOTICK,PDIR2RESYN,PDIR2UNOV,PDIR1RESYN,
569 PDIR1UNOV,UQ1CHANERR,IEC2BUFATTEN,IEC2PARERR,
570 IEC2VALNOGOOD,IEC2CNEW,IEC1BUFATTEN,UCHANTXNF,
571 UCHANTXUNDER,UCHANTXEMPTY,PDIR3UNOV,IEC1PARERR,
572 IEC1VALNOGOOD,IEC1CNEW,EBUTXRESYN,EBUTXUNOV,
573 IIS2TXRESYN,IIS2TXUNOV,IIS1TXRESYN,IIS1TXUNOV,
574 GPI0,GPI1,GPI2,GPI3,GPI4,GPI5,GPI6,GPI7,
575 UIE,UIE,UIE,UIE,UIE,UIE,UIE,SOFTINT0,
576 SOFTINT1,SOFTINT2,SOFTINT3,UIE,
577 UIE,CDROMCRCERR,CDROMNOSYNC,CDROMILSYNC,
578 CDROMNEWBLK,UIE,UIE,UIE,UIE,UIE,UIE,UIE,
579
580 UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,
581 UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,
582 UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,
583 UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,
584 UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,
585 UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,
586 UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,
587 UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE,UIE
588};
589
590void system_init(void)
591{
592 /* Clear the accumulators. From here on it's the responsibility of
593 whoever uses them to clear them after use (use movclr instruction). */
594 asm volatile ("movclr.l %%acc0, %%d0\n\t"
595 "movclr.l %%acc1, %%d0\n\t"
596 "movclr.l %%acc2, %%d0\n\t"
597 "movclr.l %%acc3, %%d0\n\t"
598 : : : "d0");
599 /* Set EMAC unit to saturating and rounding fractional mode, since that's
600 what'll be the most useful for most things which the main thread
601 will do. */
602 coldfire_set_macsr(EMAC_FRACTIONAL | EMAC_SATURATE | EMAC_ROUND);
603
604 /* Set INTBASE and SPURVEC */
605 INTBASE = 64;
606 SPURVEC = 24;
607}
608
609void system_reboot (void)
610{
611 set_cpu_frequency(0);
612
613 asm(" move.w #0x2700,%sr");
614 /* Reset the cookie for the crt0 crash check */
615 asm(" move.l #0,%d0");
616 asm(" move.l %d0,0x10017ffc");
617 asm(" movec.l %d0,%vbr");
618 asm(" move.l 0,%sp");
619 asm(" move.l 4,%a0");
620 asm(" jmp (%a0)");
621}
622
623/* Utilise the breakpoint hardware to catch invalid memory accesses. */
624int system_memory_guard(int newmode)
625{
626 static const unsigned long modes[MAXMEMGUARD][8] = {
627 { /* catch nothing */
628 0x2C870000, 0x00000000, /* TDR = 0x00000000 */
629 0x2C8D0000, 0x00000000, /* ABLR = 0x00000000 */
630 0x2C8C0000, 0x00000000, /* ABHR = 0x00000000 */
631 0x2C860000, 0x00050000, /* AATR = 0x0005 */
632 },
633 { /* catch flash ROM writes */
634 0x2C8D0000, 0x00000000, /* ABLR = 0x00000000 */
635 0x2C8C0FFF, 0xFFFF0000, /* ABHR = 0x0FFFFFFF */
636 0x2C860000, 0x6F050000, /* AATR = 0x6F05 */
637 0x2C878000, 0x20080000, /* TDR = 0x80002008 */
638 },
639 { /* catch all accesses to zero area */
640 0x2C8D0000, 0x00000000, /* ABLR = 0x00000000 */
641 0x2C8C0FFF, 0xFFFF0000, /* ABHR = 0x0FFFFFFF */
642 0x2C860000, 0xEF050000, /* AATR = 0xEF05 */
643 0x2C878000, 0x20080000, /* TDR = 0x80002008 */
644 }
645 /* Note: CPU space accesses (movec instruction), interrupt acknowledges
646 and emulator mode accesses are never caught. */
647 };
648 static int cur_mode = MEMGUARD_NONE;
649
650 int oldmode = cur_mode;
651 const unsigned long *ptr;
652 int i;
653
654 if (newmode == MEMGUARD_KEEP)
655 newmode = oldmode;
656
657 /* Always set the new mode, we don't know the old settings
658 as we cannot read back */
659 ptr = modes[newmode];
660 for (i = 0; i < 4; i++)
661 {
662 asm ( "wdebug (%0) \n" : : "a"(ptr));
663 ptr += 2;
664 }
665 cur_mode = newmode;
666
667 return oldmode;
668}
669
670/* void set_cpu_frequency(long frequency) is in
671 target tree for all 3 coldfire targets */
672
673#elif CONFIG_CPU == SH7034 395#elif CONFIG_CPU == SH7034
674#include "led.h" 396#include "led.h"
675#include "system.h" 397#include "system.h"
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