diff options
author | Jens Arnold <amiconn@rockbox.org> | 2005-07-02 12:18:10 +0000 |
---|---|---|
committer | Jens Arnold <amiconn@rockbox.org> | 2005-07-02 12:18:10 +0000 |
commit | a8cadd8181e53320109d2af61f0c7edea262d325 (patch) | |
tree | a266393b2b784fd5b9639c1a326a602b1ef34498 /firmware/export | |
parent | 8102f3da270ce5a442523a1738318493906bb86a (diff) | |
download | rockbox-a8cadd8181e53320109d2af61f0c7edea262d325.tar.gz rockbox-a8cadd8181e53320109d2af61f0c7edea262d325.zip |
Iriver: atomic I/O port manipulation macros, to avoid interference between normal and interrupt code. Todo: all other places that do port manipulation on ports which may also be changed from an intterupt should use that as well. It even decreases binary size a bit.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@6985 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export')
-rw-r--r-- | firmware/export/system.h | 37 |
1 files changed, 30 insertions, 7 deletions
diff --git a/firmware/export/system.h b/firmware/export/system.h index e98c362a8c..56fee6bdab 100644 --- a/firmware/export/system.h +++ b/firmware/export/system.h | |||
@@ -81,25 +81,48 @@ enum { | |||
81 | 81 | ||
82 | #if CONFIG_CPU == SH7034 | 82 | #if CONFIG_CPU == SH7034 |
83 | #define or_b(mask, address) \ | 83 | #define or_b(mask, address) \ |
84 | asm \ | 84 | asm \ |
85 | ("or.b\t%0,@(r0,gbr)" \ | 85 | ("or.b %0,@(r0,gbr)" \ |
86 | : \ | 86 | : \ |
87 | : /* %0 */ I_CONSTRAINT((char)(mask)), \ | 87 | : /* %0 */ I_CONSTRAINT((char)(mask)), \ |
88 | /* %1 */ "z"(address-GBR)) | 88 | /* %1 */ "z"(address-GBR)) |
89 | 89 | ||
90 | #define and_b(mask, address) \ | 90 | #define and_b(mask, address) \ |
91 | asm \ | 91 | asm \ |
92 | ("and.b\t%0,@(r0,gbr)" \ | 92 | ("and.b %0,@(r0,gbr)" \ |
93 | : \ | 93 | : \ |
94 | : /* %0 */ I_CONSTRAINT((char)(mask)), \ | 94 | : /* %0 */ I_CONSTRAINT((char)(mask)), \ |
95 | /* %1 */ "z"(address-GBR)) | 95 | /* %1 */ "z"(address-GBR)) |
96 | 96 | ||
97 | #define xor_b(mask, address) \ | 97 | #define xor_b(mask, address) \ |
98 | asm \ | 98 | asm \ |
99 | ("xor.b\t%0,@(r0,gbr)" \ | 99 | ("xor.b %0,@(r0,gbr)" \ |
100 | : \ | 100 | : \ |
101 | : /* %0 */ I_CONSTRAINT((char)(mask)), \ | 101 | : /* %0 */ I_CONSTRAINT((char)(mask)), \ |
102 | /* %1 */ "z"(address-GBR)) | 102 | /* %1 */ "z"(address-GBR)) |
103 | |||
104 | #elif CONFIG_CPU == MCF5249 | ||
105 | #define or_l(mask, address) \ | ||
106 | asm \ | ||
107 | ("or.l %0,(%1)" \ | ||
108 | : \ | ||
109 | : /* %0 */ "d"(mask), \ | ||
110 | /* %1 */ "a"(address)) | ||
111 | |||
112 | #define and_l(mask, address) \ | ||
113 | asm \ | ||
114 | ("and.l %0,(%1)" \ | ||
115 | : \ | ||
116 | : /* %0 */ "d"(mask), \ | ||
117 | /* %1 */ "a"(address)) | ||
118 | |||
119 | #define eor_l(mask, address) \ | ||
120 | asm \ | ||
121 | ("eor.l %0,(%1)" \ | ||
122 | : \ | ||
123 | : /* %0 */ "d"(mask), \ | ||
124 | /* %1 */ "a"(address)) | ||
125 | |||
103 | #endif | 126 | #endif |
104 | 127 | ||
105 | #ifndef SIMULATOR | 128 | #ifndef SIMULATOR |