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author | Amaury Pouly <amaury.pouly@gmail.com> | 2012-10-21 14:42:32 +0200 |
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committer | Amaury Pouly <amaury.pouly@gmail.com> | 2012-10-21 14:45:09 +0200 |
commit | 709827b5ea23f0df86a8056b73bf71fa93cc6681 (patch) | |
tree | 0350774c2897d483c624e71fefd1191bd3e936b7 /firmware/export | |
parent | e86991f484f29891b969e851680f66e1948542fa (diff) | |
download | rockbox-709827b5ea23f0df86a8056b73bf71fa93cc6681.tar.gz rockbox-709827b5ea23f0df86a8056b73bf71fa93cc6681.zip |
imx233: fix user timer
The running count is only 16-bit wide, since the always tick
setting derives from the crystal clock at 24MHz the user timer
cannot be set lower than ~300Hz which is already too high.
Switch to the 32KHz crystal source to fix this.
Change-Id: Ie7775460b17ea7ab331738734e3d688ad5563857
Diffstat (limited to 'firmware/export')
-rw-r--r-- | firmware/export/imx233.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/firmware/export/imx233.h b/firmware/export/imx233.h index 70be3788ff..a18b584d8e 100644 --- a/firmware/export/imx233.h +++ b/firmware/export/imx233.h | |||
@@ -61,8 +61,8 @@ | |||
61 | #define FRAME_PHYS_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE - FRAME_SIZE) | 61 | #define FRAME_PHYS_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE - FRAME_SIZE) |
62 | #define FRAME ((void *)(FRAME_PHYS_ADDR - UNCACHED_DRAM_ADDR + BUFFERED_DRAM_ADDR)) | 62 | #define FRAME ((void *)(FRAME_PHYS_ADDR - UNCACHED_DRAM_ADDR + BUFFERED_DRAM_ADDR)) |
63 | 63 | ||
64 | /* Timer runs at APBX speed which is derived from ref_xtal@24MHz */ | 64 | /* Timer runs at 32KHz, derived from clk32k@32KHz */ |
65 | #define TIMER_FREQ 24000000 | 65 | #define TIMER_FREQ 32000 |
66 | 66 | ||
67 | /* USBOTG */ | 67 | /* USBOTG */ |
68 | #define USB_QHARRAY_ATTR __attribute__((section(".qharray"),nocommon,aligned(2048))) | 68 | #define USB_QHARRAY_ATTR __attribute__((section(".qharray"),nocommon,aligned(2048))) |