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author | Karl Kurbjun <kkurbjun@gmail.com> | 2007-10-23 03:29:15 +0000 |
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committer | Karl Kurbjun <kkurbjun@gmail.com> | 2007-10-23 03:29:15 +0000 |
commit | 5a9a2b7bc4e1e2a97ec731524bb7e127f5c8cacf (patch) | |
tree | 6933baa85655794d2b4b6df64681f8969b520297 /firmware/export | |
parent | 9d9225ed1ddefab985ab3ffd7e77bccf979f1c5b (diff) | |
download | rockbox-5a9a2b7bc4e1e2a97ec731524bb7e127f5c8cacf.tar.gz rockbox-5a9a2b7bc4e1e2a97ec731524bb7e127f5c8cacf.zip |
Unify the Gigabeat F/X and M:Robe MMU code while enabling it for the M:Robe
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15275 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export')
-rw-r--r-- | firmware/export/dm320.h | 5 | ||||
-rw-r--r-- | firmware/export/s3c2440.h | 2 |
2 files changed, 5 insertions, 2 deletions
diff --git a/firmware/export/dm320.h b/firmware/export/dm320.h index 0c84444a66..4dfc55dcd3 100644 --- a/firmware/export/dm320.h +++ b/firmware/export/dm320.h | |||
@@ -25,7 +25,10 @@ | |||
25 | #define __DM320_H__ | 25 | #define __DM320_H__ |
26 | 26 | ||
27 | #define LCD_BUFFER_SIZE (640*480*4) | 27 | #define LCD_BUFFER_SIZE (640*480*4) |
28 | #define FRAME ((short *) (0x4900000-LCD_BUFFER_SIZE)) /* Put the buffer at the end of mem */ | 28 | #define TTB_SIZE (0x4000) |
29 | /* must be 16Kb (0x4000) aligned */ | ||
30 | #define TTB_BASE ((unsigned int *)(0x04900000 - TTB_SIZE)) /* End of memory */ | ||
31 | #define FRAME ((short *) (TTB_BASE - LCD_BUFFER_SIZE)) /* Right before TTB */ | ||
29 | 32 | ||
30 | #define PHY_IO_BASE 0x00030000 | 33 | #define PHY_IO_BASE 0x00030000 |
31 | #define DM320_REG(addr) (*(volatile unsigned short *)(PHY_IO_BASE + (addr))) | 34 | #define DM320_REG(addr) (*(volatile unsigned short *)(PHY_IO_BASE + (addr))) |
diff --git a/firmware/export/s3c2440.h b/firmware/export/s3c2440.h index 1eaa77bf80..e43dd7688d 100644 --- a/firmware/export/s3c2440.h +++ b/firmware/export/s3c2440.h | |||
@@ -229,7 +229,7 @@ | |||
229 | #define TTB_SIZE (0x4000) | 229 | #define TTB_SIZE (0x4000) |
230 | /*#define FRAME ( (short *) 0x31E00000 ) */ /* LCD Frame buffer - Firmware Address */ | 230 | /*#define FRAME ( (short *) 0x31E00000 ) */ /* LCD Frame buffer - Firmware Address */ |
231 | /* must be 16Kb (0x4000) aligned */ | 231 | /* must be 16Kb (0x4000) aligned */ |
232 | #define TTB_BASE (0x30000000 + (32*1024*1024) - TTB_SIZE) /* End of memory */ | 232 | #define TTB_BASE ((unsigned int *)(0x30000000 + (32*1024*1024) - TTB_SIZE)) /* End of memory */ |
233 | #define FRAME ((short *) (TTB_BASE - LCD_BUFFER_SIZE)) /* Right before TTB */ | 233 | #define FRAME ((short *) (TTB_BASE - LCD_BUFFER_SIZE)) /* Right before TTB */ |
234 | /* NAND Flash */ | 234 | /* NAND Flash */ |
235 | 235 | ||