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| author | Linus Nielsen Feltzing <linus@haxx.se> | 2004-10-27 06:50:00 +0000 |
|---|---|---|
| committer | Linus Nielsen Feltzing <linus@haxx.se> | 2004-10-27 06:50:00 +0000 |
| commit | 58462ab101629624d6158d4db9102ba874629362 (patch) | |
| tree | 273945544e4d791680706d8fcd119f8d4dbf963e /firmware/export | |
| parent | abeb582a9cb347bcf14b265ad1fa5ff5caa5ed6b (diff) | |
| download | rockbox-58462ab101629624d6158d4db9102ba874629362.tar.gz rockbox-58462ab101629624d6158d4db9102ba874629362.zip | |
The timer registers are 16-bit
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5364 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export')
| -rw-r--r-- | firmware/export/mcf5249.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/firmware/export/mcf5249.h b/firmware/export/mcf5249.h index 154644647d..bde737f2c7 100644 --- a/firmware/export/mcf5249.h +++ b/firmware/export/mcf5249.h | |||
| @@ -49,16 +49,16 @@ | |||
| 49 | #define DMR0 (*(unsigned long *)(MBAR + 0x10c)) | 49 | #define DMR0 (*(unsigned long *)(MBAR + 0x10c)) |
| 50 | #define DACR1 (*(unsigned long *)(MBAR + 0x110)) | 50 | #define DACR1 (*(unsigned long *)(MBAR + 0x110)) |
| 51 | #define DMR1 (*(unsigned long *)(MBAR + 0x114)) | 51 | #define DMR1 (*(unsigned long *)(MBAR + 0x114)) |
| 52 | #define TMR0 (*(unsigned long *)(MBAR + 0x140)) | 52 | #define TMR0 (*(unsigned short *)(MBAR + 0x140)) |
| 53 | #define TRR0 (*(unsigned long *)(MBAR + 0x144)) | 53 | #define TRR0 (*(unsigned short *)(MBAR + 0x144)) |
| 54 | #define TCR0 (*(unsigned long *)(MBAR + 0x148)) | 54 | #define TCR0 (*(unsigned short *)(MBAR + 0x148)) |
| 55 | #define TCN0 (*(unsigned long *)(MBAR + 0x14c)) | 55 | #define TCN0 (*(unsigned short *)(MBAR + 0x14c)) |
| 56 | #define TER0 (*(unsigned long *)(MBAR + 0x150)) | 56 | #define TER0 (*(unsigned short *)(MBAR + 0x150)) |
| 57 | #define TMR1 (*(unsigned long *)(MBAR + 0x180)) | 57 | #define TMR1 (*(unsigned short *)(MBAR + 0x180)) |
| 58 | #define TRR1 (*(unsigned long *)(MBAR + 0x184)) | 58 | #define TRR1 (*(unsigned short *)(MBAR + 0x184)) |
| 59 | #define TCR1 (*(unsigned long *)(MBAR + 0x188)) | 59 | #define TCR1 (*(unsigned short *)(MBAR + 0x188)) |
| 60 | #define TCN1 (*(unsigned long *)(MBAR + 0x18c)) | 60 | #define TCN1 (*(unsigned short *)(MBAR + 0x18c)) |
| 61 | #define TER1 (*(unsigned long *)(MBAR + 0x190)) | 61 | #define TER1 (*(unsigned short *)(MBAR + 0x190)) |
| 62 | 62 | ||
| 63 | #define UMR10 (*(unsigned char *)(MBAR + 0x1c0)) | 63 | #define UMR10 (*(unsigned char *)(MBAR + 0x1c0)) |
| 64 | #define UMR20 (*(unsigned char *)(MBAR + 0x1c0)) | 64 | #define UMR20 (*(unsigned char *)(MBAR + 0x1c0)) |