iPod Classic: Enable boosting by switching the CPU between 1x and 2x AHB clock

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29265 a1c6a512-1295-4272-9138-f99709370657

2 files changed, 18 insertions, 7 deletions

diff --git a/firmware/export/config/ipod6g.h b/firmware/export/config/ipod6g.h
index 16cf9afcef..6ab89e5869 100644
--- a/firmware/export/config/ipod6g.h
+++ b/firmware/export/config/ipod6g.h
@@ -168,10 +168,9 @@
 #define HAVE_USB_CHARGING_ENABLE

 

 /* The size of the flash ROM */

-#define FLASH_SIZE 0x400000

+#define FLASH_SIZE 0x1000000

 

 /* Define this to the CPU frequency */

-//TODO: Figure out exact value

 #define CPU_FREQ        216000000

 

 /* define this if the hardware can be powered off while charging */

@@ -195,7 +194,7 @@
 #define MAX_PHYS_SECTOR_SIZE 4096

 

 /* Define this if you have adjustable CPU frequency */

-//TODO: #define HAVE_ADJUSTABLE_CPU_FREQ

+#define HAVE_ADJUSTABLE_CPU_FREQ

 

 #define BOOTFILE_EXT "ipod"

 #define BOOTFILE "rockbox." BOOTFILE_EXT

diff --git a/firmware/export/s5l8702.h b/firmware/export/s5l8702.h
index bb3553ed14..076e661fa4 100644
--- a/firmware/export/s5l8702.h
+++ b/firmware/export/s5l8702.h
@@ -28,8 +28,7 @@
 #define REG16_PTR_T volatile uint16_t *

 #define REG32_PTR_T volatile uint32_t *

 

-//TODO: Figure out exact value

-#define TIMER_FREQ  216000000

+#define TIMER_FREQ  54000000

 

 #define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */

 

@@ -42,8 +41,21 @@
 #define TTB_SIZE                  0x4000

 #define TTB_BASE_ADDR             (DRAM_ORIG + DRAM_SIZE - TTB_SIZE)

 

-/////SYSCON/////

-#define CLKCON0C     (*((uint32_t volatile*)(0x3C50000C)))

+/////SYSTEM CONTROLLER/////

+#define CLKCON0      (*((volatile uint32_t*)(0x3C500000)))

+#define CLKCON1      (*((volatile uint32_t*)(0x3C500004)))

+#define CLKCON2      (*((volatile uint32_t*)(0x3C500008)))

+#define CLKCON3      (*((volatile uint32_t*)(0x3C50000C)))

+#define CLKCON4      (*((volatile uint32_t*)(0x3C500010)))

+#define CLKCON5      (*((volatile uint32_t*)(0x3C500014)))

+#define PLL0PMS      (*((volatile uint32_t*)(0x3C500020)))

+#define PLL1PMS      (*((volatile uint32_t*)(0x3C500024)))

+#define PLL2PMS      (*((volatile uint32_t*)(0x3C500028)))

+#define PLL0LCNT     (*((volatile uint32_t*)(0x3C500030)))

+#define PLL1LCNT     (*((volatile uint32_t*)(0x3C500034)))

+#define PLL2LCNT     (*((volatile uint32_t*)(0x3C500038)))

+#define PLLLOCK      (*((volatile uint32_t*)(0x3C500040)))

+#define PLLMODE      (*((volatile uint32_t*)(0x3C500044)))

 #define PWRCON(i)    (*((uint32_t volatile*)(0x3C500000 \

                                            + ((i) == 4 ? 0x6C : \

                                              ((i) == 3 ? 0x68 : \