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author | Maurus Cuelenaere <mcuelenaere@gmail.com> | 2009-01-22 00:04:20 +0000 |
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committer | Maurus Cuelenaere <mcuelenaere@gmail.com> | 2009-01-22 00:04:20 +0000 |
commit | 311d2f12ed024cf11971f23231e05a0143361115 (patch) | |
tree | 3537e656cbb1a1e6bbba3a8431a34059cc8398b1 /firmware/export | |
parent | e79fc8aaef541b48a84a23e6771e3ec5a2efe5ac (diff) | |
download | rockbox-311d2f12ed024cf11971f23231e05a0143361115.tar.gz rockbox-311d2f12ed024cf11971f23231e05a0143361115.zip |
Onda VX747: get NAND driver working
generic NAND ID driver: clean up
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19817 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export')
-rw-r--r-- | firmware/export/jz4740.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/firmware/export/jz4740.h b/firmware/export/jz4740.h index aa31a229f9..7910fbec92 100644 --- a/firmware/export/jz4740.h +++ b/firmware/export/jz4740.h | |||
@@ -1762,14 +1762,16 @@ | |||
1762 | #define EMC_SACR_MASK_MASK (0xff << EMC_SACR_MASK_BIT) | 1762 | #define EMC_SACR_MASK_MASK (0xff << EMC_SACR_MASK_BIT) |
1763 | 1763 | ||
1764 | /* NAND Flash Control/Status Register */ | 1764 | /* NAND Flash Control/Status Register */ |
1765 | #define EMC_NFCSR_NFCE4 (1 << 7) /* NAND Flash Enable */ | 1765 | #define EMC_NFCSR_NFCE4 (1 << 7) /* NAND Flash Enable */ |
1766 | #define EMC_NFCSR_NFE4 (1 << 6) /* NAND Flash FCE# Assertion Enable */ | 1766 | #define EMC_NFCSR_NFE4 (1 << 6) /* NAND Flash FCE# Assertion Enable */ |
1767 | #define EMC_NFCSR_NFCE3 (1 << 5) | 1767 | #define EMC_NFCSR_NFCE3 (1 << 5) |
1768 | #define EMC_NFCSR_NFE3 (1 << 4) | 1768 | #define EMC_NFCSR_NFE3 (1 << 4) |
1769 | #define EMC_NFCSR_NFCE2 (1 << 3) | 1769 | #define EMC_NFCSR_NFCE2 (1 << 3) |
1770 | #define EMC_NFCSR_NFE2 (1 << 2) | 1770 | #define EMC_NFCSR_NFE2 (1 << 2) |
1771 | #define EMC_NFCSR_NFCE1 (1 << 1) | 1771 | #define EMC_NFCSR_NFCE1 (1 << 1) |
1772 | #define EMC_NFCSR_NFE1 (1 << 0) | 1772 | #define EMC_NFCSR_NFE1 (1 << 0) |
1773 | #define EMC_NFCSR_NFE(n) (1 << (((n)-1)*2)) | ||
1774 | #define EMC_NFCSR_NFCE(n) (1 << (((n)*2)-1)) | ||
1773 | 1775 | ||
1774 | /* NAND Flash ECC Control Register */ | 1776 | /* NAND Flash ECC Control Register */ |
1775 | #define EMC_NFECR_PRDY (1 << 4) /* Parity Ready */ | 1777 | #define EMC_NFECR_PRDY (1 << 4) /* Parity Ready */ |