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author | Aidan MacDonald <amachronic@protonmail.com> | 2022-01-11 13:58:03 +0000 |
---|---|---|
committer | Aidan MacDonald <amachronic@protonmail.com> | 2022-01-16 19:17:25 -0500 |
commit | 18b3e91707e42873eab833f0f3da709062207ba7 (patch) | |
tree | 7a5ebfc65961713243b607e83fba9e3758cbcc45 /firmware/export | |
parent | 15e3d37110f1674ec7d52c2f055ebfad1d77b5da (diff) | |
download | rockbox-18b3e91707e42873eab833f0f3da709062207ba7.tar.gz rockbox-18b3e91707e42873eab833f0f3da709062207ba7.zip |
x1000: internal codec audio driver
Change-Id: I2eb551ec6b593951c33ae6b93df2a23dc6612c43
Diffstat (limited to 'firmware/export')
-rw-r--r-- | firmware/export/audiohw.h | 7 | ||||
-rw-r--r-- | firmware/export/x1000-codec.h | 184 |
2 files changed, 191 insertions, 0 deletions
diff --git a/firmware/export/audiohw.h b/firmware/export/audiohw.h index 3f1bcb6feb..a365b97828 100644 --- a/firmware/export/audiohw.h +++ b/firmware/export/audiohw.h | |||
@@ -192,6 +192,8 @@ struct sound_settings_info | |||
192 | #include "tsc2100.h" | 192 | #include "tsc2100.h" |
193 | #elif defined(HAVE_JZ4740_CODEC) | 193 | #elif defined(HAVE_JZ4740_CODEC) |
194 | #include "jz4740-codec.h" | 194 | #include "jz4740-codec.h" |
195 | #elif defined(HAVE_X1000_ICODEC_PLAY) | ||
196 | #include "x1000-codec.h" | ||
195 | #elif defined(HAVE_AK4537) | 197 | #elif defined(HAVE_AK4537) |
196 | #include "ak4537.h" | 198 | #include "ak4537.h" |
197 | #elif defined(HAVE_AK4376) | 199 | #elif defined(HAVE_AK4376) |
@@ -237,6 +239,11 @@ struct sound_settings_info | |||
237 | #include "erosqlinux_codec.h" | 239 | #include "erosqlinux_codec.h" |
238 | #endif | 240 | #endif |
239 | 241 | ||
242 | #if defined(HAVE_X1000_ICODEC_REC) && !defined(HAVE_X1000_ICODEC_PLAY) | ||
243 | /* Targets may have an external DAC above, but use icodec for recording only */ | ||
244 | #include "x1000-codec.h" | ||
245 | #endif | ||
246 | |||
240 | /* convert caps into defines */ | 247 | /* convert caps into defines */ |
241 | #ifdef AUDIOHW_CAPS | 248 | #ifdef AUDIOHW_CAPS |
242 | /* Tone controls */ | 249 | /* Tone controls */ |
diff --git a/firmware/export/x1000-codec.h b/firmware/export/x1000-codec.h new file mode 100644 index 0000000000..cfc71dbd60 --- /dev/null +++ b/firmware/export/x1000-codec.h | |||
@@ -0,0 +1,184 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2021-2022 Aidan MacDonald | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | #ifndef __X1000_CODEC_H__ | ||
23 | #define __X1000_CODEC_H__ | ||
24 | |||
25 | #include "config.h" | ||
26 | #include <stdbool.h> | ||
27 | |||
28 | /* Note: the internal X1000 codec supports playback and record, but devices | ||
29 | * can employ an external codec for one and the internal codec for the other. | ||
30 | * The caveat, in this case, is that only one codec can be used at a time | ||
31 | * because the HW cannot mux playback/record independently. | ||
32 | * | ||
33 | * At present only recording is implemented, since all X1000 ports use an | ||
34 | * external DAC for playback. | ||
35 | */ | ||
36 | |||
37 | #ifdef HAVE_X1000_ICODEC_PLAY | ||
38 | # error "X1000 icodec playback not implemented" | ||
39 | #endif | ||
40 | |||
41 | #define X1000_ICODEC_ADC_GAIN_MIN 0 | ||
42 | #define X1000_ICODEC_ADC_GAIN_MAX 43 | ||
43 | #define X1000_ICODEC_ADC_GAIN_STEP 1 | ||
44 | |||
45 | #define X1000_ICODEC_MIC_GAIN_MIN 0 | ||
46 | #define X1000_ICODEC_MIC_GAIN_MAX 20 | ||
47 | #define X1000_ICODEC_MIC_GAIN_STEP 4 | ||
48 | |||
49 | #ifdef HAVE_X1000_ICODEC_REC | ||
50 | AUDIOHW_SETTING(MIC_GAIN, "dB", 0, 1, 0, 63, 12) | ||
51 | #endif | ||
52 | |||
53 | #define JZCODEC_INDIRECT_CREG(r) ((r) & 0xff) | ||
54 | #define JZCODEC_INDIRECT_INDEX(r) (((r) >> 8) & 0x7) | ||
55 | #define JZCODEC_INDIRECT_BIT 0x800 | ||
56 | |||
57 | #define JZCODEC_INDIRECT(c, i) (JZCODEC_INDIRECT_BIT | ((i) << 8) | (c)) | ||
58 | |||
59 | /* Codec registers from Ingenic's kernel sources. The datasheet is badly | ||
60 | * screwed up and the addresses listed cannot be trusted. */ | ||
61 | enum { | ||
62 | JZCODEC_SR = 0, | ||
63 | JZCODEC_SR2, | ||
64 | JZCODEC_SIGR, | ||
65 | JZCODEC_SIGR2, | ||
66 | JZCODEC_SIGR3, | ||
67 | JZCODEC_SIGR5, | ||
68 | JZCODEC_SIGR7, | ||
69 | JZCODEC_MR, | ||
70 | JZCODEC_AICR_DAC, | ||
71 | JZCODEC_AICR_ADC, | ||
72 | JZCODEC_CR_DMIC, | ||
73 | JZCODEC_CR_MIC1, | ||
74 | JZCODEC_CR_MIC2, | ||
75 | JZCODEC_CR_DAC, | ||
76 | JZCODEC_CR_DAC2, | ||
77 | JZCODEC_CR_ADC, | ||
78 | JZCODEC_CR_MIX, | ||
79 | JZCODEC_DR_MIX, | ||
80 | JZCODEC_CR_VIC, | ||
81 | JZCODEC_CR_CK, | ||
82 | JZCODEC_FCR_DAC, | ||
83 | JZCODEC_SFCCR_DAC, | ||
84 | JZCODEC_SFFCR_DAC, | ||
85 | JZCODEC_FCR_ADC, | ||
86 | JZCODEC_CR_TIMER_MSB, | ||
87 | JZCODEC_CR_TIMER_LSB, | ||
88 | JZCODEC_ICR, | ||
89 | JZCODEC_IMR, | ||
90 | JZCODEC_IFR, | ||
91 | JZCODEC_IMR2, | ||
92 | JZCODEC_IFR2, | ||
93 | JZCODEC_GCR_DACL, | ||
94 | JZCODEC_GCR_DACR, | ||
95 | JZCODEC_GCR_DACL2, | ||
96 | JZCODEC_GCR_DACR2, | ||
97 | JZCODEC_GCR_MIC1, | ||
98 | JZCODEC_GCR_MIC2, | ||
99 | JZCODEC_GCR_ADCL, | ||
100 | JZCODEC_GCR_ADCR, | ||
101 | JZCODEC_GCR_MIXDACL, | ||
102 | JZCODEC_GCR_MIXDACR, | ||
103 | JZCODEC_GCR_MIXADCL, | ||
104 | JZCODEC_GCR_MIXADCR, | ||
105 | JZCODEC_CR_DAC_AGC, | ||
106 | JZCODEC_DR_DAC_AGC, | ||
107 | JZCODEC_CR_DAC2_AGC, | ||
108 | JZCODEC_DR_DAC2_AGC, | ||
109 | JZCODEC_CR_ADC_AGC, | ||
110 | JZCODEC_DR_ADC_AGC, | ||
111 | JZCODEC_SR_ADC_AGCDGL, | ||
112 | JZCODEC_SR_ADC_AGCDGR, | ||
113 | JZCODEC_SR_ADC_AGCAGL, | ||
114 | JZCODEC_SR_ADC_AGCAGR, | ||
115 | JZCODEC_CR_TR, | ||
116 | JZCODEC_DR_TR, | ||
117 | JZCODEC_SR_TR1, | ||
118 | JZCODEC_SR_TR2, | ||
119 | JZCODEC_SR_TR_SRCDAC, | ||
120 | |||
121 | JZCODEC_MIX0 = JZCODEC_INDIRECT(JZCODEC_CR_MIX, 0), | ||
122 | JZCODEC_MIX1 = JZCODEC_INDIRECT(JZCODEC_CR_MIX, 1), | ||
123 | JZCODEC_MIX2 = JZCODEC_INDIRECT(JZCODEC_CR_MIX, 2), | ||
124 | JZCODEC_MIX3 = JZCODEC_INDIRECT(JZCODEC_CR_MIX, 3), | ||
125 | JZCODEC_MIX4 = JZCODEC_INDIRECT(JZCODEC_CR_MIX, 4), | ||
126 | |||
127 | JZCODEC_DAC_AGC0 = JZCODEC_INDIRECT(JZCODEC_CR_DAC_AGC, 0), | ||
128 | JZCODEC_DAC_AGC1 = JZCODEC_INDIRECT(JZCODEC_CR_DAC_AGC, 1), | ||
129 | JZCODEC_DAC_AGC2 = JZCODEC_INDIRECT(JZCODEC_CR_DAC_AGC, 2), | ||
130 | JZCODEC_DAC_AGC3 = JZCODEC_INDIRECT(JZCODEC_CR_DAC_AGC, 3), | ||
131 | |||
132 | JZCODEC_DAC2_AGC0 = JZCODEC_INDIRECT(JZCODEC_CR_DAC2_AGC, 0), | ||
133 | JZCODEC_DAC2_AGC1 = JZCODEC_INDIRECT(JZCODEC_CR_DAC2_AGC, 1), | ||
134 | JZCODEC_DAC2_AGC2 = JZCODEC_INDIRECT(JZCODEC_CR_DAC2_AGC, 2), | ||
135 | JZCODEC_DAC2_AGC3 = JZCODEC_INDIRECT(JZCODEC_CR_DAC2_AGC, 3), | ||
136 | |||
137 | JZCODEC_ADC_AGC0 = JZCODEC_INDIRECT(JZCODEC_CR_ADC_AGC, 0), | ||
138 | JZCODEC_ADC_AGC1 = JZCODEC_INDIRECT(JZCODEC_CR_ADC_AGC, 1), | ||
139 | JZCODEC_ADC_AGC2 = JZCODEC_INDIRECT(JZCODEC_CR_ADC_AGC, 2), | ||
140 | JZCODEC_ADC_AGC3 = JZCODEC_INDIRECT(JZCODEC_CR_ADC_AGC, 3), | ||
141 | JZCODEC_ADC_AGC4 = JZCODEC_INDIRECT(JZCODEC_CR_ADC_AGC, 4), | ||
142 | }; | ||
143 | |||
144 | /* for use with x1000_icodec_mic1_configure() */ | ||
145 | enum { | ||
146 | JZCODEC_MIC1_SINGLE_ENDED = (0 << 6), | ||
147 | JZCODEC_MIC1_DIFFERENTIAL = (1 << 6), | ||
148 | |||
149 | JZCODEC_MIC1_BIAS_2_08V = (0 << 3), | ||
150 | JZCODEC_MIC1_BIAS_1_66V = (1 << 3), | ||
151 | |||
152 | JZCODEC_MIC1_CONFIGURE_MASK = (1 << 6) | (1 << 3), | ||
153 | }; | ||
154 | |||
155 | /* for use with x1000_icodec_adc_mic_sel() */ | ||
156 | enum { | ||
157 | JZCODEC_MIC_SEL_ANALOG, | ||
158 | JZCODEC_MIC_SEL_DIGITAL, | ||
159 | }; | ||
160 | |||
161 | extern void x1000_icodec_open(void); | ||
162 | extern void x1000_icodec_close(void); | ||
163 | |||
164 | extern void x1000_icodec_dac_frequency(int fsel); | ||
165 | |||
166 | extern void x1000_icodec_adc_enable(bool en); | ||
167 | extern void x1000_icodec_adc_mute(bool muted); | ||
168 | extern void x1000_icodec_adc_mic_sel(int sel); | ||
169 | extern void x1000_icodec_adc_frequency(int fsel); | ||
170 | extern void x1000_icodec_adc_highpass_filter(bool en); | ||
171 | extern void x1000_icodec_adc_gain(int gain_dB); | ||
172 | |||
173 | extern void x1000_icodec_mic1_enable(bool en); | ||
174 | extern void x1000_icodec_mic1_bias_enable(bool en); | ||
175 | extern void x1000_icodec_mic1_configure(int settings); | ||
176 | extern void x1000_icodec_mic1_gain(int gain_dB); | ||
177 | |||
178 | extern void x1000_icodec_mixer_enable(bool en); | ||
179 | |||
180 | extern int x1000_icodec_read(int reg); | ||
181 | extern void x1000_icodec_write(int reg, int value); | ||
182 | extern void x1000_icodec_update(int reg, int mask, int value); | ||
183 | |||
184 | #endif /* __X1000_CODEC_H__ */ | ||