diff options
author | Rob Purchase <shotofadds@rockbox.org> | 2009-10-10 17:35:02 +0000 |
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committer | Rob Purchase <shotofadds@rockbox.org> | 2009-10-10 17:35:02 +0000 |
commit | 16ada4cb81c70c1a151c69aa08da13e55aba0081 (patch) | |
tree | c92dda004a162cea1d2ded3188cffe1ca6f04077 /firmware/export | |
parent | 31464f7930cd8857ef8d00ed75534087057058e2 (diff) | |
download | rockbox-16ada4cb81c70c1a151c69aa08da13e55aba0081.tar.gz rockbox-16ada4cb81c70c1a151c69aa08da13e55aba0081.zip |
Initial support for runtime detection of the PMU used in newer D2+ models (PCF50635). The backlight and battery monitoring should work, but the RTC and touchscreen are not yet implemented.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23078 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export')
-rw-r--r-- | firmware/export/pcf50635.h | 34 | ||||
-rw-r--r-- | firmware/export/pcf5063x.h | 384 |
2 files changed, 418 insertions, 0 deletions
diff --git a/firmware/export/pcf50635.h b/firmware/export/pcf50635.h new file mode 100644 index 0000000000..716ed52899 --- /dev/null +++ b/firmware/export/pcf50635.h | |||
@@ -0,0 +1,34 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2009 by Rob Purchase | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #ifndef PCF50635_H | ||
22 | #define PCF50635_H | ||
23 | |||
24 | #include "pcf5063x.h" | ||
25 | |||
26 | void pcf50635_init(void); | ||
27 | int pcf50635_write_multiple(int address, const unsigned char* buf, int count); | ||
28 | int pcf50635_write(int address, unsigned char val); | ||
29 | int pcf50635_read_multiple(int address, unsigned char* buf, int count); | ||
30 | int pcf50635_read(int address); | ||
31 | |||
32 | void pcf50635_read_adc(int adc, short* res1, short* res2); | ||
33 | |||
34 | #endif /* PCF50635_H */ | ||
diff --git a/firmware/export/pcf5063x.h b/firmware/export/pcf5063x.h new file mode 100644 index 0000000000..164417f483 --- /dev/null +++ b/firmware/export/pcf5063x.h | |||
@@ -0,0 +1,384 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Philips PCF50633 Power Managemnt Unit (PMU) driver | ||
11 | * (C) 2006-2007 by Openmoko, Inc. | ||
12 | * Author: Harald Welte <laforge@openmoko.org> | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or | ||
15 | * modify it under the terms of the GNU General Public License | ||
16 | * as published by the Free Software Foundation; either version 2 | ||
17 | * of the License, or (at your option) any later version. | ||
18 | * | ||
19 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
20 | * KIND, either express or implied. | ||
21 | * | ||
22 | ****************************************************************************/ | ||
23 | #ifndef PCF5063X_H | ||
24 | #define PCF5063X_H | ||
25 | |||
26 | enum pcf5063X_regs { | ||
27 | PCF5063X_REG_VERSION = 0x00, | ||
28 | PCF5063X_REG_VARIANT = 0x01, | ||
29 | PCF5063X_REG_INT1 = 0x02, /* Interrupt Status */ | ||
30 | PCF5063X_REG_INT2 = 0x03, /* Interrupt Status */ | ||
31 | PCF5063X_REG_INT3 = 0x04, /* Interrupt Status */ | ||
32 | PCF5063X_REG_INT4 = 0x05, /* Interrupt Status */ | ||
33 | PCF5063X_REG_INT5 = 0x06, /* Interrupt Status */ | ||
34 | PCF5063X_REG_INT1M = 0x07, /* Interrupt Mask */ | ||
35 | PCF5063X_REG_INT2M = 0x08, /* Interrupt Mask */ | ||
36 | PCF5063X_REG_INT3M = 0x09, /* Interrupt Mask */ | ||
37 | PCF5063X_REG_INT4M = 0x0a, /* Interrupt Mask */ | ||
38 | PCF5063X_REG_INT5M = 0x0b, /* Interrupt Mask */ | ||
39 | PCF5063X_REG_OOCSHDWN = 0x0c, | ||
40 | PCF5063X_REG_OOCWAKE = 0x0d, | ||
41 | PCF5063X_REG_OOCTIM1 = 0x0e, | ||
42 | PCF5063X_REG_OOCTIM2 = 0x0f, | ||
43 | PCF5063X_REG_OOCMODE = 0x10, | ||
44 | PCF5063X_REG_OOCCTL = 0x11, | ||
45 | PCF5063X_REG_OOCSTAT = 0x12, | ||
46 | PCF5063X_REG_GPIOCTL = 0x13, | ||
47 | PCF5063X_REG_GPIO1CFG = 0x14, | ||
48 | PCF5063X_REG_GPIO2CFG = 0x15, | ||
49 | PCF5063X_REG_GPIO3CFG = 0x16, | ||
50 | PCF5063X_REG_GPOCFG = 0x17, | ||
51 | PCF5063X_REG_BVMCTL = 0x18, | ||
52 | PCF5063X_REG_SVMCTL = 0x19, | ||
53 | PCF5063X_REG_AUTOOUT = 0x1a, | ||
54 | PCF5063X_REG_AUTOENA = 0x1b, | ||
55 | PCF5063X_REG_AUTOCTL = 0x1c, | ||
56 | PCF5063X_REG_AUTOMXC = 0x1d, | ||
57 | PCF5063X_REG_DOWN1OUT = 0x1e, | ||
58 | PCF5063X_REG_DOWN1ENA = 0x1f, | ||
59 | PCF5063X_REG_DOWN1CTL = 0x20, | ||
60 | PCF5063X_REG_DOWN1MXC = 0x21, | ||
61 | PCF5063X_REG_DOWN2OUT = 0x22, | ||
62 | PCF5063X_REG_DOWN2ENA = 0x23, | ||
63 | PCF5063X_REG_DOWN2CTL = 0x24, | ||
64 | PCF5063X_REG_DOWN2MXC = 0x25, | ||
65 | PCF5063X_REG_MEMLDOOUT = 0x26, | ||
66 | PCF5063X_REG_MEMLDOENA = 0x27, | ||
67 | PCF5063X_REG_LEDOUT = 0x28, | ||
68 | PCF5063X_REG_LEDENA = 0x29, | ||
69 | PCF5063X_REG_LEDCTL = 0x2a, | ||
70 | PCF5063X_REG_LEDDIM = 0x2b, | ||
71 | /* reserved */ | ||
72 | PCF5063X_REG_LDO1OUT = 0x2d, | ||
73 | PCF5063X_REG_LDO1ENA = 0x2e, | ||
74 | PCF5063X_REG_LDO2OUT = 0x2f, | ||
75 | PCF5063X_REG_LDO2ENA = 0x30, | ||
76 | PCF5063X_REG_LDO3OUT = 0x31, | ||
77 | PCF5063X_REG_LDO3ENA = 0x32, | ||
78 | PCF5063X_REG_LDO4OUT = 0x33, | ||
79 | PCF5063X_REG_LDO4ENA = 0x34, | ||
80 | PCF5063X_REG_LDO5OUT = 0x35, | ||
81 | PCF5063X_REG_LDO5ENA = 0x36, | ||
82 | PCF5063X_REG_LDO6OUT = 0x37, | ||
83 | PCF5063X_REG_LDO6ENA = 0x38, | ||
84 | PCF5063X_REG_HCLDOOUT = 0x39, | ||
85 | PCF5063X_REG_HCLDOENA = 0x3a, | ||
86 | PCF5063X_REG_STBYCTL1 = 0x3b, | ||
87 | PCF5063X_REG_STBYCTL2 = 0x3c, | ||
88 | PCF5063X_REG_DEBPF1 = 0x3d, | ||
89 | PCF5063X_REG_DEBPF2 = 0x3e, | ||
90 | PCF5063X_REG_DEBPF3 = 0x3f, | ||
91 | PCF5063X_REG_HCLDOOVL = 0x40, | ||
92 | PCF5063X_REG_DCDCSTAT = 0x41, | ||
93 | PCF5063X_REG_LDOSTAT = 0x42, | ||
94 | PCF5063X_REG_MBCC1 = 0x43, | ||
95 | PCF5063X_REG_MBCC2 = 0x44, | ||
96 | PCF5063X_REG_MBCC3 = 0x45, | ||
97 | PCF5063X_REG_MBCC4 = 0x46, | ||
98 | PCF5063X_REG_MBCC5 = 0x47, | ||
99 | PCF5063X_REG_MBCC6 = 0x48, | ||
100 | PCF5063X_REG_MBCC7 = 0x49, | ||
101 | PCF5063X_REG_MBCC8 = 0x4a, | ||
102 | PCF5063X_REG_MBCS1 = 0x4b, | ||
103 | PCF5063X_REG_MBCS2 = 0x4c, | ||
104 | PCF5063X_REG_MBCS3 = 0x4d, | ||
105 | PCF5063X_REG_BBCCTL = 0x4e, | ||
106 | PCF5063X_REG_ALMGAIN = 0x4f, | ||
107 | PCF5063X_REG_ALMDATA = 0x50, | ||
108 | /* reserved */ | ||
109 | PCF5063X_REG_ADCC3 = 0x52, | ||
110 | PCF5063X_REG_ADCC2 = 0x53, | ||
111 | PCF5063X_REG_ADCC1 = 0x54, | ||
112 | PCF5063X_REG_ADCS1 = 0x55, | ||
113 | PCF5063X_REG_ADCS2 = 0x56, | ||
114 | PCF5063X_REG_ADCS3 = 0x57, | ||
115 | /* reserved */ | ||
116 | PCF5063X_REG_RTCSC = 0x59, /* Second */ | ||
117 | PCF5063X_REG_RTCMN = 0x5a, /* Minute */ | ||
118 | PCF5063X_REG_RTCHR = 0x5b, /* Hour */ | ||
119 | PCF5063X_REG_RTCWD = 0x5c, /* Weekday */ | ||
120 | PCF5063X_REG_RTCDT = 0x5d, /* Day */ | ||
121 | PCF5063X_REG_RTCMT = 0x5e, /* Month */ | ||
122 | PCF5063X_REG_RTCYR = 0x5f, /* Year */ | ||
123 | PCF5063X_REG_RTCSCA = 0x60, /* Alarm Second */ | ||
124 | PCF5063X_REG_RTCMNA = 0x61, /* Alarm Minute */ | ||
125 | PCF5063X_REG_RTCHRA = 0x62, /* Alarm Hour */ | ||
126 | PCF5063X_REG_RTCWDA = 0x63, /* Alarm Weekday */ | ||
127 | PCF5063X_REG_RTCDTA = 0x64, /* Alarm Day */ | ||
128 | PCF5063X_REG_RTCMTA = 0x65, /* Alarm Month */ | ||
129 | PCF5063X_REG_RTCYRA = 0x66, /* Alarm Year */ | ||
130 | |||
131 | PCF5063X_REG_MEMBYTE0 = 0x67, | ||
132 | PCF5063X_REG_MEMBYTE1 = 0x68, | ||
133 | PCF5063X_REG_MEMBYTE2 = 0x69, | ||
134 | PCF5063X_REG_MEMBYTE3 = 0x6a, | ||
135 | PCF5063X_REG_MEMBYTE4 = 0x6b, | ||
136 | PCF5063X_REG_MEMBYTE5 = 0x6c, | ||
137 | PCF5063X_REG_MEMBYTE6 = 0x6d, | ||
138 | PCF5063X_REG_MEMBYTE7 = 0x6e, | ||
139 | /* reserved */ | ||
140 | PCF5063X_REG_DCDCPFM = 0x84, | ||
141 | __NUM_PCF5063X_REGS | ||
142 | }; | ||
143 | |||
144 | |||
145 | enum pcf5063X_reg_oocshdwn { | ||
146 | PCF5063X_OOCSHDWN_GOSTDBY = 0x01, | ||
147 | PCF5063X_OOCSHDWN_TOTRST = 0x04, | ||
148 | PCF5063X_OOCSHDWN_COLDBOOT = 0x08, | ||
149 | }; | ||
150 | |||
151 | enum pcf5063X_reg_oocwake { | ||
152 | PCF5063X_OOCWAKE_ONKEY = 0x01, | ||
153 | PCF5063X_OOCWAKE_EXTON1 = 0x02, | ||
154 | PCF5063X_OOCWAKE_EXTON2 = 0x04, | ||
155 | PCF5063X_OOCWAKE_EXTON3 = 0x08, | ||
156 | PCF5063X_OOCWAKE_RTC = 0x10, | ||
157 | /* reserved */ | ||
158 | PCF5063X_OOCWAKE_USB = 0x40, | ||
159 | PCF5063X_OOCWAKE_ADP = 0x80, | ||
160 | }; | ||
161 | |||
162 | enum pcf5063X_reg_mbcc1 { | ||
163 | PCF5063X_MBCC1_CHGENA = 0x01, /* Charger enable */ | ||
164 | PCF5063X_MBCC1_AUTOSTOP = 0x02, | ||
165 | PCF5063X_MBCC1_AUTORES = 0x04, /* automatic resume */ | ||
166 | PCF5063X_MBCC1_RESUME = 0x08, /* explicit resume cmd */ | ||
167 | PCF5063X_MBCC1_RESTART = 0x10, /* restart charging */ | ||
168 | PCF5063X_MBCC1_PREWDTIME_60M = 0x20, /* max. precharging time */ | ||
169 | PCF5063X_MBCC1_WDTIME_1H = 0x00, | ||
170 | PCF5063X_MBCC1_WDTIME_2H = 0x40, | ||
171 | PCF5063X_MBCC1_WDTIME_4H = 0x80, | ||
172 | PCF5063X_MBCC1_WDTIME_6H = 0xc0, | ||
173 | }; | ||
174 | #define PCF5063X_MBCC1_WDTIME_MASK 0xc0 | ||
175 | |||
176 | enum pcf5063X_reg_mbcc2 { | ||
177 | PCF5063X_MBCC2_VBATCOND_2V7 = 0x00, | ||
178 | PCF5063X_MBCC2_VBATCOND_2V85 = 0x01, | ||
179 | PCF5063X_MBCC2_VBATCOND_3V0 = 0x02, | ||
180 | PCF5063X_MBCC2_VBATCOND_3V15 = 0x03, | ||
181 | PCF5063X_MBCC2_VMAX_4V = 0x00, | ||
182 | PCF5063X_MBCC2_VMAX_4V20 = 0x28, | ||
183 | PCF5063X_MBCC2_VRESDEBTIME_64S = 0x80, /* debounce time (32/64sec) */ | ||
184 | }; | ||
185 | #define PCF5063X_MBCC2_VBATCOND_MASK 0x03 | ||
186 | #define PCF5063X_MBCC2_VMAX_MASK 0x3c | ||
187 | |||
188 | enum pcf5063X_reg_adcc1 { | ||
189 | PCF5063X_ADCC1_ADCSTART = 0x01, | ||
190 | PCF5063X_ADCC1_RES_10BIT = 0x02, | ||
191 | PCF5063X_ADCC1_AVERAGE_NO = 0x00, | ||
192 | PCF5063X_ADCC1_AVERAGE_4 = 0x04, | ||
193 | PCF5063X_ADCC1_AVERAGE_8 = 0x08, | ||
194 | PCF5063X_ADCC1_AVERAGE_16 = 0x0c, | ||
195 | |||
196 | PCF5063X_ADCC1_MUX_BATSNS_RES = 0x00, | ||
197 | PCF5063X_ADCC1_MUX_BATSNS_SUBTR = 0x10, | ||
198 | PCF5063X_ADCC1_MUX_ADCIN2_RES = 0x20, | ||
199 | PCF5063X_ADCC1_MUX_ADCIN2_SUBTR = 0x30, | ||
200 | PCF5063X_ADCC1_MUX_BATTEMP = 0x60, | ||
201 | PCF5063X_ADCC1_MUX_ADCIN1 = 0x70, | ||
202 | }; | ||
203 | #define PCF5063X_ADCC1_AVERAGE_MASK 0x0c | ||
204 | #define PCF5063X_ADCC1_ADCMUX_MASK 0xf0 | ||
205 | |||
206 | enum pcf5063X_reg_adcc2 { | ||
207 | PCF5063X_ADCC2_RATIO_NONE = 0x00, | ||
208 | PCF5063X_ADCC2_RATIO_BATTEMP = 0x01, | ||
209 | PCF5063X_ADCC2_RATIO_ADCIN1 = 0x02, | ||
210 | PCF5063X_ADCC2_RATIO_BOTH = 0x03, | ||
211 | PCF5063X_ADCC2_RATIOSETTL_100US = 0x04, | ||
212 | }; | ||
213 | #define PCF5063X_ADCC2_RATIO_MASK 0x03 | ||
214 | |||
215 | enum pcf5063X_reg_adcc3 { | ||
216 | PCF5063X_ADCC3_ACCSW_EN = 0x01, | ||
217 | PCF5063X_ADCC3_NTCSW_EN = 0x04, | ||
218 | PCF5063X_ADCC3_RES_DIV_TWO = 0x10, | ||
219 | PCF5063X_ADCC3_RES_DIV_THREE = 0x00, | ||
220 | }; | ||
221 | |||
222 | enum pcf5063X_reg_adcs3 { | ||
223 | PCF5063X_ADCS3_REF_NTCSW = 0x00, | ||
224 | PCF5063X_ADCS3_REF_ACCSW = 0x10, | ||
225 | PCF5063X_ADCS3_REF_2V0 = 0x20, | ||
226 | PCF5063X_ADCS3_REF_VISA = 0x30, | ||
227 | PCF5063X_ADCS3_REF_2V0_2 = 0x70, | ||
228 | PCF5063X_ADCS3_ADCRDY = 0x80, | ||
229 | }; | ||
230 | #define PCF5063X_ADCS3_ADCDAT1L_MASK 0x03 | ||
231 | #define PCF5063X_ADCS3_ADCDAT2L_MASK 0x0c | ||
232 | #define PCF5063X_ADCS3_ADCDAT2L_SHIFT 2 | ||
233 | #define PCF5063X_ASCS3_REF_MASK 0x70 | ||
234 | |||
235 | enum pcf5063X_regulator_enable { | ||
236 | PCF5063X_REGULATOR_ON = 0x01, | ||
237 | PCF5063X_REGULATOR_ON_GPIO1 = 0x02, | ||
238 | PCF5063X_REGULATOR_ON_GPIO2 = 0x04, | ||
239 | PCF5063X_REGULATOR_ON_GPIO3 = 0x08, | ||
240 | }; | ||
241 | #define PCF5063X_REGULATOR_ON_MASK 0x0f | ||
242 | |||
243 | enum pcf5063X_regulator_phase { | ||
244 | PCF5063X_REGULATOR_ACTPH1 = 0x00, | ||
245 | PCF5063X_REGULATOR_ACTPH2 = 0x10, | ||
246 | PCF5063X_REGULATOR_ACTPH3 = 0x20, | ||
247 | PCF5063X_REGULATOR_ACTPH4 = 0x30, | ||
248 | }; | ||
249 | #define PCF5063X_REGULATOR_ACTPH_MASK 0x30 | ||
250 | |||
251 | enum pcf5063X_reg_gpocfg { | ||
252 | PCF5063X_GPOCFG_GPOSEL_0 = 0x00, | ||
253 | PCF5063X_GPOCFG_GPOSEL_LED_NFET = 0x01, | ||
254 | PCF5063X_GPOCFG_GPOSEL_SYSxOK = 0x02, | ||
255 | PCF5063X_GPOCFG_GPOSEL_CLK32K = 0x03, | ||
256 | PCF5063X_GPOCFG_GPOSEL_ADAPUSB = 0x04, | ||
257 | PCF5063X_GPOCFG_GPOSEL_USBxOK = 0x05, | ||
258 | PCF5063X_GPOCFG_GPOSEL_ACTPH4 = 0x06, | ||
259 | PCF5063X_GPOCFG_GPOSEL_1 = 0x07, | ||
260 | PCF5063X_GPOCFG_GPOSEL_INVERSE = 0x08, | ||
261 | }; | ||
262 | #define PCF5063X_GPOCFG_GPOSEL_MASK 0x07 | ||
263 | |||
264 | enum pcf5063X_reg_mbcc7 { | ||
265 | PCF5063X_MBCC7_USB_100mA = 0x00, | ||
266 | PCF5063X_MBCC7_USB_500mA = 0x01, | ||
267 | PCF5063X_MBCC7_USB_1000mA = 0x02, | ||
268 | PCF5063X_MBCC7_USB_SUSPEND = 0x03, | ||
269 | PCF5063X_MBCC7_BATTEMP_EN = 0x04, | ||
270 | PCF5063X_MBCC7_BATSYSIMAX_1A6 = 0x00, | ||
271 | PCF5063X_MBCC7_BATSYSIMAX_1A8 = 0x40, | ||
272 | PCF5063X_MBCC7_BATSYSIMAX_2A0 = 0x80, | ||
273 | PCF5063X_MBCC7_BATSYSIMAX_2A2 = 0xc0, | ||
274 | }; | ||
275 | #define PCF56033_MBCC7_USB_MASK 0x03 | ||
276 | |||
277 | enum pcf5063X_reg_mbcc8 { | ||
278 | PCF5063X_MBCC8_USBENASUS = 0x10, | ||
279 | }; | ||
280 | |||
281 | enum pcf5063X_reg_mbcs1 { | ||
282 | PCF5063X_MBCS1_USBPRES = 0x01, | ||
283 | PCF5063X_MBCS1_USBOK = 0x02, | ||
284 | PCF5063X_MBCS1_ADAPTPRES = 0x04, | ||
285 | PCF5063X_MBCS1_ADAPTOK = 0x08, | ||
286 | PCF5063X_MBCS1_TBAT_OK = 0x00, | ||
287 | PCF5063X_MBCS1_TBAT_ABOVE = 0x10, | ||
288 | PCF5063X_MBCS1_TBAT_BELOW = 0x20, | ||
289 | PCF5063X_MBCS1_TBAT_UNDEF = 0x30, | ||
290 | PCF5063X_MBCS1_PREWDTEXP = 0x40, | ||
291 | PCF5063X_MBCS1_WDTEXP = 0x80, | ||
292 | }; | ||
293 | |||
294 | enum pcf5063X_reg_mbcs2_mbcmod { | ||
295 | PCF5063X_MBCS2_MBC_PLAY = 0x00, | ||
296 | PCF5063X_MBCS2_MBC_USB_PRE = 0x01, | ||
297 | PCF5063X_MBCS2_MBC_USB_PRE_WAIT = 0x02, | ||
298 | PCF5063X_MBCS2_MBC_USB_FAST = 0x03, | ||
299 | PCF5063X_MBCS2_MBC_USB_FAST_WAIT= 0x04, | ||
300 | PCF5063X_MBCS2_MBC_USB_SUSPEND = 0x05, | ||
301 | PCF5063X_MBCS2_MBC_ADP_PRE = 0x06, | ||
302 | PCF5063X_MBCS2_MBC_ADP_PRE_WAIT = 0x07, | ||
303 | PCF5063X_MBCS2_MBC_ADP_FAST = 0x08, | ||
304 | PCF5063X_MBCS2_MBC_ADP_FAST_WAIT= 0x09, | ||
305 | PCF5063X_MBCS2_MBC_BAT_FULL = 0x0a, | ||
306 | PCF5063X_MBCS2_MBC_HALT = 0x0b, | ||
307 | }; | ||
308 | #define PCF5063X_MBCS2_MBC_MASK 0x0f | ||
309 | enum pcf5063X_reg_mbcs2_chgstat { | ||
310 | PCF5063X_MBCS2_CHGS_NONE = 0x00, | ||
311 | PCF5063X_MBCS2_CHGS_ADAPTER = 0x10, | ||
312 | PCF5063X_MBCS2_CHGS_USB = 0x20, | ||
313 | PCF5063X_MBCS2_CHGS_BOTH = 0x30, | ||
314 | }; | ||
315 | #define PCF5063X_MBCS2_RESSTAT_AUTO 0x40 | ||
316 | |||
317 | enum pcf5063X_reg_mbcs3 { | ||
318 | PCF5063X_MBCS3_USBLIM_PLAY = 0x01, | ||
319 | PCF5063X_MBCS3_USBLIM_CGH = 0x02, | ||
320 | PCF5063X_MBCS3_TLIM_PLAY = 0x04, | ||
321 | PCF5063X_MBCS3_TLIM_CHG = 0x08, | ||
322 | PCF5063X_MBCS3_ILIM = 0x10, /* 1: Ibat > Icutoff */ | ||
323 | PCF5063X_MBCS3_VLIM = 0x20, /* 1: Vbat == Vmax */ | ||
324 | PCF5063X_MBCS3_VBATSTAT = 0x40, /* 1: Vbat > Vbatcond */ | ||
325 | PCF5063X_MBCS3_VRES = 0x80, /* 1: Vbat > Vth(RES) */ | ||
326 | }; | ||
327 | |||
328 | |||
329 | enum pcf5063X_reg_int1 { | ||
330 | PCF5063X_INT1_ADPINS = 0x01, /* Adapter inserted */ | ||
331 | PCF5063X_INT1_ADPREM = 0x02, /* Adapter removed */ | ||
332 | PCF5063X_INT1_USBINS = 0x04, /* USB inserted */ | ||
333 | PCF5063X_INT1_USBREM = 0x08, /* USB removed */ | ||
334 | /* reserved */ | ||
335 | PCF5063X_INT1_ALARM = 0x40, /* RTC alarm time is reached */ | ||
336 | PCF5063X_INT1_SECOND = 0x80, /* RTC periodic second interrupt */ | ||
337 | }; | ||
338 | |||
339 | enum pcf5063X_reg_int2 { | ||
340 | PCF5063X_INT2_ONKEYR = 0x01, /* ONKEY rising edge */ | ||
341 | PCF5063X_INT2_ONKEYF = 0x02, /* ONKEY falling edge */ | ||
342 | PCF5063X_INT2_EXTON1R = 0x04, /* EXTON1 rising edge */ | ||
343 | PCF5063X_INT2_EXTON1F = 0x08, /* EXTON1 falling edge */ | ||
344 | PCF5063X_INT2_EXTON2R = 0x10, /* EXTON2 rising edge */ | ||
345 | PCF5063X_INT2_EXTON2F = 0x20, /* EXTON2 falling edge */ | ||
346 | PCF5063X_INT2_EXTON3R = 0x40, /* EXTON3 rising edge */ | ||
347 | PCF5063X_INT2_EXTON3F = 0x80, /* EXTON3 falling edge */ | ||
348 | }; | ||
349 | |||
350 | enum pcf5063X_reg_int3 { | ||
351 | PCF5063X_INT3_BATFULL = 0x01, /* Battery full */ | ||
352 | PCF5063X_INT3_CHGHALT = 0x02, /* Charger halt */ | ||
353 | PCF5063X_INT3_THLIMON = 0x04, | ||
354 | PCF5063X_INT3_THLIMOFF = 0x08, | ||
355 | PCF5063X_INT3_USBLIMON = 0x10, | ||
356 | PCF5063X_INT3_USBLIMOFF = 0x20, | ||
357 | PCF5063X_INT3_ADCRDY = 0x40, /* ADC result ready */ | ||
358 | PCF5063X_INT3_ONKEY1S = 0x80, /* ONKEY pressed 1 second */ | ||
359 | }; | ||
360 | |||
361 | enum pcf5063X_reg_int4 { | ||
362 | PCF5063X_INT4_LOWSYS = 0x01, | ||
363 | PCF5063X_INT4_LOWBAT = 0x02, | ||
364 | PCF5063X_INT4_HIGHTMP = 0x04, | ||
365 | PCF5063X_INT4_AUTOPWRFAIL = 0x08, | ||
366 | PCF5063X_INT4_DWN1PWRFAIL = 0x10, | ||
367 | PCF5063X_INT4_DWN2PWRFAIL = 0x20, | ||
368 | PCF5063X_INT4_LEDPWRFAIL = 0x40, | ||
369 | PCF5063X_INT4_LEDOVP = 0x80, | ||
370 | }; | ||
371 | |||
372 | enum pcf5063X_reg_int5 { | ||
373 | PCF5063X_INT5_LDO1PWRFAIL = 0x01, | ||
374 | PCF5063X_INT5_LDO2PWRFAIL = 0x02, | ||
375 | PCF5063X_INT5_LDO3PWRFAIL = 0x04, | ||
376 | PCF5063X_INT5_LDO4PWRFAIL = 0x08, | ||
377 | PCF5063X_INT5_LDO5PWRFAIL = 0x10, | ||
378 | PCF5063X_INT5_LDO6PWRFAIL = 0x20, | ||
379 | PCF5063X_INT5_HCLDOPWRFAIL = 0x40, | ||
380 | PCF5063X_INT5_HCLDOOVL = 0x80, | ||
381 | }; | ||
382 | |||
383 | |||
384 | #endif /* PCF5063X_H */ | ||