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authorAmaury Pouly <pamaury@rockbox.org>2011-09-05 11:29:32 +0000
committerAmaury Pouly <pamaury@rockbox.org>2011-09-05 11:29:32 +0000
commit7d4fed53cc1e8b0e5aa250ebea3a1b53fc3a50b2 (patch)
tree236a72d742675715fd599daaa98af8f4eeb45ad8 /firmware/export/imx233.h
parent11e1f71612f6c1ef8c17f8ceea17f69fd4bc7b02 (diff)
downloadrockbox-7d4fed53cc1e8b0e5aa250ebea3a1b53fc3a50b2.tar.gz
rockbox-7d4fed53cc1e8b0e5aa250ebea3a1b53fc3a50b2.zip
imx233:fuze+: major memory and usb rework
- now identity map dram uncached and have a cached and buffered virtual alias - rework dma to handle virtual to physical pointers conversion - fix lcd frame pointer - implement usb detection properly - implement bootloader usb properly - allow the bootloader to disable MMC windowing (useful for recovery) git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30432 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/imx233.h')
-rw-r--r--firmware/export/imx233.h30
1 files changed, 28 insertions, 2 deletions
diff --git a/firmware/export/imx233.h b/firmware/export/imx233.h
index d9ea06a420..2a2097b5d7 100644
--- a/firmware/export/imx233.h
+++ b/firmware/export/imx233.h
@@ -21,17 +21,41 @@
21#ifndef __IMX233_H__ 21#ifndef __IMX233_H__
22#define __IMX233_H__ 22#define __IMX233_H__
23 23
24/*
25 * Chip Memory Map:
26 * 0x00000000 - 0x00007fff: on chip ram
27 * 0x40000000 - 0x5fffffff: dram (512Mb max)
28 * 0x80000000 - 0x80100000: memory mapped registers
29 * We use the following map:
30 * 0x60000000 - 0x7fffffff: dram (cached)
31 * 0x90000000 - 0xafffffff: dram (buffered)
32 * everything else : identity mapped (uncached)
33 *
34 * As a side note it's important to notice that uncached dram is identity mapped
35 */
36
24#define IRAM_ORIG 0 37#define IRAM_ORIG 0
25#define IRAM_SIZE 0x8000 38#define IRAM_SIZE 0x8000
26#define DRAM_ORIG 0x40000000 39#define DRAM_ORIG 0x40000000
27#define DRAM_SIZE (MEMORYSIZE * 0x100000) 40#define DRAM_SIZE (MEMORYSIZE * 0x100000)
28 41
42#define UNCACHED_DRAM_ADDR 0x40000000
43#define CACHED_DRAM_ADDR 0x60000000
44#define BUFFERED_DRAM_ADDR 0x90000000
45#define CACHEALIGN_SIZE 32
46
47#define PHYSICAL_ADDR(a) \
48 ((typeof(a))((uintptr_t)(a) >= CACHED_DRAM_ADDR ? \
49 ((uintptr_t)(a) - CACHED_DRAM_ADDR + UNCACHED_DRAM_ADDR) \
50 :(uintptr_t)(a)))
51#define UNCACHED_ADDR(a) PHYSICAL_ADDR(a)
52
29#define TTB_BASE_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE) 53#define TTB_BASE_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE)
30#define TTB_SIZE 0x4000 54#define TTB_SIZE 0x4000
31#define TTB_BASE ((unsigned long *)TTB_BASE_ADDR) 55#define TTB_BASE ((unsigned long *)TTB_BASE_ADDR)
32#define FRAME_SIZE (LCD_WIDTH * LCD_HEIGHT * LCD_DEPTH / 8) 56#define FRAME_SIZE (LCD_WIDTH * LCD_HEIGHT * LCD_DEPTH / 8)
33#define LCD_FRAME_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE - FRAME_SIZE) 57#define FRAME_PHYS_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE - FRAME_SIZE)
34#define FRAME ((unsigned short *)LCD_FRAME_ADDR) 58#define FRAME ((void *)(FRAME_PHYS_ADDR - UNCACHED_DRAM_ADDR + BUFFERED_DRAM_ADDR))
35 59
36/* USBOTG */ 60/* USBOTG */
37#define USB_QHARRAY_ATTR __attribute__((section(".qharray"),nocommon,aligned(2048))) 61#define USB_QHARRAY_ATTR __attribute__((section(".qharray"),nocommon,aligned(2048)))
@@ -52,5 +76,7 @@
52 76
53#define CACHEALIGN_BITS 4 77#define CACHEALIGN_BITS 4
54 78
79#define __XTRACT(reg, field) ((reg & reg##__##field##_BM) >> reg##__##field##_BP)
80#define __XTRACT_EX(val, field) (((val) & field##_BM) >> field##_BP)
55 81
56#endif /* __IMX233_H__ */ 82#endif /* __IMX233_H__ */