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authorKarl Kurbjun <kkurbjun@gmail.com>2009-04-01 03:21:18 +0000
committerKarl Kurbjun <kkurbjun@gmail.com>2009-04-01 03:21:18 +0000
commit4fa96fbc914ae8fd69aedafd73f4f1798679d29f (patch)
treeea0deb3e1573e1dfd540441002e58b403670d178 /firmware/export/dm320.h
parenta606121dd860245328198ac773d454980191abc3 (diff)
downloadrockbox-4fa96fbc914ae8fd69aedafd73f4f1798679d29f.tar.gz
rockbox-4fa96fbc914ae8fd69aedafd73f4f1798679d29f.zip
M:Robe 500i: More LCD initialization, and beginnings of support for QVGA as well as VGA on the LCD. MPEGPlayer now works with reasonable performance on smaller videos, but YUV blitting persists after MPEGPlayer is left, some cleanup/changes to the initialization code. This should be functionally equivalent for the ZVM, but the #ifdef's may need to be added back for app.lds. Get the bootloader building again.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20598 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/dm320.h')
-rw-r--r--firmware/export/dm320.h17
1 files changed, 7 insertions, 10 deletions
diff --git a/firmware/export/dm320.h b/firmware/export/dm320.h
index 3d932c69c1..d6599a6745 100644
--- a/firmware/export/dm320.h
+++ b/firmware/export/dm320.h
@@ -27,17 +27,14 @@
27#ifndef __DM320_H__ 27#ifndef __DM320_H__
28#define __DM320_H__ 28#define __DM320_H__
29 29
30#define LCD_BUFFER_SIZE (LCD_WIDTH*LCD_HEIGHT*2) 30#if !defined(__ASSEMBLER__) && !defined(__LD__)
31#define TTB_SIZE (0x4000) 31/* These variables are created during linking (app/boot.lds) */
32/* must be 16Kb (0x4000) aligned */ 32extern unsigned long _lcdbuf;
33#if 1 33extern unsigned long _ttbstart;
34#define MEM_END 0x00900000 + (MEM*0x00100000)
35#define TTB_BASE_ADDR (MEM_END - TTB_SIZE)
36#else
37#define TTB_BASE_ADDR (0x04900000 - TTB_SIZE)
38#endif 34#endif
39#define TTB_BASE ((unsigned long *)TTB_BASE_ADDR) /* End of memory */ 35
40#define FRAME ((short *) (TTB_BASE_ADDR - LCD_BUFFER_SIZE)) /* Right before TTB */ 36#define TTB_BASE_ADDR (_ttbstart) /* End of memory */
37#define FRAME ((short *) (&_lcdbuf)) /* Right before TTB */
41 38
42#define PHY_IO_BASE 0x00030000 39#define PHY_IO_BASE 0x00030000
43#define DM320_REG(addr) (*(volatile unsigned short *)(PHY_IO_BASE + (addr))) 40#define DM320_REG(addr) (*(volatile unsigned short *)(PHY_IO_BASE + (addr)))