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author | Michael Sevakis <jethead71@rockbox.org> | 2010-06-10 17:31:45 +0000 |
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committer | Michael Sevakis <jethead71@rockbox.org> | 2010-06-10 17:31:45 +0000 |
commit | 05ca8978c4fe965a619f016d79aaf6955767abf9 (patch) | |
tree | 606a19c322864fa823fda7c0a6daf998f76417e3 /firmware/export/config.h | |
parent | 863891ce9aef50fde13cf3df897aca144a2c570a (diff) | |
download | rockbox-05ca8978c4fe965a619f016d79aaf6955767abf9.tar.gz rockbox-05ca8978c4fe965a619f016d79aaf6955767abf9.zip |
Clean unused stuff out of thread.h and config.h and reorganize thread-pp.c to simplify the preprocessor blocks.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26743 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/config.h')
-rw-r--r-- | firmware/export/config.h | 23 |
1 files changed, 2 insertions, 21 deletions
diff --git a/firmware/export/config.h b/firmware/export/config.h index 2039aa55f9..5947ca171e 100644 --- a/firmware/export/config.h +++ b/firmware/export/config.h | |||
@@ -793,11 +793,6 @@ Lyre prototype 1 */ | |||
793 | #define FORCE_SINGLE_CORE | 793 | #define FORCE_SINGLE_CORE |
794 | #endif | 794 | #endif |
795 | 795 | ||
796 | /* Core locking types - specifies type of atomic operation */ | ||
797 | #define CORELOCK_NONE 0 | ||
798 | #define SW_CORELOCK 1 /* Mutual exclusion provided by a software algorithm | ||
799 | and not a special semaphore instruction */ | ||
800 | |||
801 | #if defined(CPU_PP) | 796 | #if defined(CPU_PP) |
802 | #define IDLE_STACK_SIZE 0x80 | 797 | #define IDLE_STACK_SIZE 0x80 |
803 | #define IDLE_STACK_WORDS 0x20 | 798 | #define IDLE_STACK_WORDS 0x20 |
@@ -811,6 +806,7 @@ Lyre prototype 1 */ | |||
811 | #if !defined(FORCE_SINGLE_CORE) | 806 | #if !defined(FORCE_SINGLE_CORE) |
812 | 807 | ||
813 | #define NUM_CORES 2 | 808 | #define NUM_CORES 2 |
809 | #define HAVE_CORELOCK_OBJECT | ||
814 | #define CURRENT_CORE current_core() | 810 | #define CURRENT_CORE current_core() |
815 | /* Attributes for core-shared data in DRAM where IRAM is better used for other | 811 | /* Attributes for core-shared data in DRAM where IRAM is better used for other |
816 | * purposes. */ | 812 | * purposes. */ |
@@ -821,9 +817,7 @@ Lyre prototype 1 */ | |||
821 | #define IF_COP_VOID(...) __VA_ARGS__ | 817 | #define IF_COP_VOID(...) __VA_ARGS__ |
822 | #define IF_COP_CORE(core) core | 818 | #define IF_COP_CORE(core) core |
823 | 819 | ||
824 | #define CONFIG_CORELOCK SW_CORELOCK /* SWP(B) is broken */ | 820 | #endif /* !defined(FORCE_SINGLE_CORE) */ |
825 | |||
826 | #endif /* !defined(BOOTLOADER) && CONFIG_CPU != PP5002 */ | ||
827 | 821 | ||
828 | #endif /* CPU_PP */ | 822 | #endif /* CPU_PP */ |
829 | 823 | ||
@@ -832,18 +826,6 @@ Lyre prototype 1 */ | |||
832 | #define NOCACHEDATA_ATTR __attribute__((section(".ncdata"),nocommon)) | 826 | #define NOCACHEDATA_ATTR __attribute__((section(".ncdata"),nocommon)) |
833 | #endif | 827 | #endif |
834 | 828 | ||
835 | #ifndef CONFIG_CORELOCK | ||
836 | #define CONFIG_CORELOCK CORELOCK_NONE | ||
837 | #endif | ||
838 | |||
839 | #if CONFIG_CORELOCK == SW_CORELOCK | ||
840 | #define IF_SWCL(...) __VA_ARGS__ | ||
841 | #define IFN_SWCL(...) | ||
842 | #else | ||
843 | #define IF_SWCL(...) | ||
844 | #define IFN_SWCL(...) __VA_ARGS__ | ||
845 | #endif /* CONFIG_CORELOCK == */ | ||
846 | |||
847 | #ifndef NUM_CORES | 829 | #ifndef NUM_CORES |
848 | /* Default to single core */ | 830 | /* Default to single core */ |
849 | #define NUM_CORES 1 | 831 | #define NUM_CORES 1 |
@@ -855,7 +837,6 @@ Lyre prototype 1 */ | |||
855 | #define NOCACHEBSS_ATTR | 837 | #define NOCACHEBSS_ATTR |
856 | #define NOCACHEDATA_ATTR | 838 | #define NOCACHEDATA_ATTR |
857 | #endif | 839 | #endif |
858 | #define CONFIG_CORELOCK CORELOCK_NONE | ||
859 | 840 | ||
860 | #define IF_COP(...) | 841 | #define IF_COP(...) |
861 | #define IF_COP_VOID(...) void | 842 | #define IF_COP_VOID(...) void |