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| author | Rafaël Carré <rafael.carre@gmail.com> | 2009-11-24 12:05:53 +0000 |
|---|---|---|
| committer | Rafaël Carré <rafael.carre@gmail.com> | 2009-11-24 12:05:53 +0000 |
| commit | ed13fd6dca3503b4513ba7b6a61b01a4e59fd363 (patch) | |
| tree | 6ef67348cb49fe7fde7aac42c0ba5c0da49874ce /firmware/export/config-fuze.h | |
| parent | 4314ceb73b68cc36e28e8d3711159578b0404c8c (diff) | |
| download | rockbox-ed13fd6dca3503b4513ba7b6a61b01a4e59fd363.tar.gz rockbox-ed13fd6dca3503b4513ba7b6a61b01a4e59fd363.zip | |
Sansa AMS: VIC_INT_ENABLE register is not a mask
When read it returns all enabled interrupt sources
When written it enables interrupt sources for each bit set
So just like VIC_INT_EN_CLEAR, we don't have to read the previous value
before writing to it (VIC_INT_EN_CLEAR is write-only anyway)
Thanks to Fred Bauer for spotting
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23734 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/config-fuze.h')
0 files changed, 0 insertions, 0 deletions