diff options
author | Jens Arnold <amiconn@rockbox.org> | 2006-03-17 15:42:06 +0000 |
---|---|---|
committer | Jens Arnold <amiconn@rockbox.org> | 2006-03-17 15:42:06 +0000 |
commit | cb9e316d4de6d919965aaf8124b35bbe23e5baa9 (patch) | |
tree | b57b1ddf5a2b8ab830386bd2efbf71446e8cc2d3 /firmware/drivers | |
parent | f18de23428f88ef362e66d3c0af7bbd457617114 (diff) | |
download | rockbox-cb9e316d4de6d919965aaf8124b35bbe23e5baa9.tar.gz rockbox-cb9e316d4de6d919965aaf8124b35bbe23e5baa9.zip |
H300: Cut-down LCD init & working display flip.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@9078 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/drivers')
-rw-r--r-- | firmware/drivers/lcd-h300.c | 277 |
1 files changed, 127 insertions, 150 deletions
diff --git a/firmware/drivers/lcd-h300.c b/firmware/drivers/lcd-h300.c index 046bd3a9cb..0bdb123d41 100644 --- a/firmware/drivers/lcd-h300.c +++ b/firmware/drivers/lcd-h300.c | |||
@@ -30,7 +30,9 @@ | |||
30 | #include "font.h" | 30 | #include "font.h" |
31 | #include "bidi.h" | 31 | #include "bidi.h" |
32 | 32 | ||
33 | static bool display_on=false; /* is the display turned on? */ | 33 | static bool display_on = false; /* is the display turned on? */ |
34 | static bool display_flipped = false; | ||
35 | static int xoffset = 0; /* needed for flip */ | ||
34 | 36 | ||
35 | /* register defines */ | 37 | /* register defines */ |
36 | #define R_START_OSC 0x00 | 38 | #define R_START_OSC 0x00 |
@@ -101,72 +103,76 @@ void lcd_set_invert_display(bool yesno) | |||
101 | (void)yesno; | 103 | (void)yesno; |
102 | } | 104 | } |
103 | 105 | ||
104 | /* turn the display upside down (call lcd_update() afterwards) */ | 106 | static void flip_lcd(bool yesno) |
105 | void lcd_set_flip(bool yesno) | ||
106 | { | 107 | { |
107 | (void)yesno; | 108 | if (yesno) |
109 | { | ||
110 | lcd_write_reg(R_DRV_OUTPUT_CONTROL, 0x031b); /* 224 lines, GS=SS=1 */ | ||
111 | lcd_write_reg(R_GATE_SCAN_POS, 0x0002); /* 16 lines offset */ | ||
112 | lcd_write_reg(R_1ST_SCR_DRV_POS, 0xdf04); /* 4..223 */ | ||
113 | } | ||
114 | else | ||
115 | { | ||
116 | lcd_write_reg(R_DRV_OUTPUT_CONTROL, 0x001b); /* 224 lines, GS=SS=0 */ | ||
117 | lcd_write_reg(R_GATE_SCAN_POS, 0x0000); | ||
118 | lcd_write_reg(R_1ST_SCR_DRV_POS, 0xdb00); /* 0..219 */ | ||
119 | } | ||
108 | } | 120 | } |
109 | 121 | ||
110 | /* LCD init */ | 122 | /* turn the display upside down (call lcd_update() afterwards) */ |
111 | void lcd_init_device(void) | 123 | void lcd_set_flip(bool yesno) |
112 | { | 124 | { |
113 | /* GPO46 is LCD RESET */ | 125 | display_flipped = yesno; |
114 | or_l(0x00004000, &GPIO1_OUT); | 126 | xoffset = yesno ? 4 : 0; |
115 | or_l(0x00004000, &GPIO1_ENABLE); | ||
116 | or_l(0x00004000, &GPIO1_FUNCTION); | ||
117 | 127 | ||
118 | /* Reset LCD */ | 128 | if (display_on) |
119 | sleep(1); | 129 | flip_lcd(yesno); |
120 | and_l(~0x00004000, &GPIO1_OUT); | 130 | } |
121 | sleep(1); | ||
122 | or_l(0x00004000, &GPIO1_OUT); | ||
123 | sleep(1); | ||
124 | 131 | ||
132 | static void _display_on(void) | ||
133 | { | ||
134 | /** Sequence according to datasheet, p. 132 **/ | ||
135 | |||
125 | lcd_write_reg(R_START_OSC, 0x0001); /* Start Oscilation */ | 136 | lcd_write_reg(R_START_OSC, 0x0001); /* Start Oscilation */ |
126 | sleep(1); | 137 | sleep(1); |
127 | lcd_write_reg(R_DISP_CONTROL1, 0x0040); /* zero all bits */ | 138 | |
128 | lcd_write_reg(R_POWER_CONTROL3, 0x0000); | 139 | /* zero everything*/ |
129 | lcd_write_reg(R_POWER_CONTROL4, 0x0000); | 140 | lcd_write_reg(R_POWER_CONTROL1, 0x0000); /* STB = 0, SLP = 0 */ |
141 | lcd_write_reg(R_DISP_CONTROL1, 0x0000); /* GON = 0, DTE = 0, D1-0 = 00b */ | ||
142 | lcd_write_reg(R_POWER_CONTROL3, 0x0000); /* PON = 0 */ | ||
143 | lcd_write_reg(R_POWER_CONTROL4, 0x0000); /* VCOMG = 0 */ | ||
130 | sleep(1); | 144 | sleep(1); |
131 | lcd_write_reg(R_POWER_CONTROL2, 0x0003); /* VciOUT = 0.83*VciLVL */ | 145 | |
132 | lcd_write_reg(R_POWER_CONTROL3, 0x0008); /* Vreg1OUT = REGP*1.90 */ | 146 | /* initialise power supply */ |
133 | |||
134 | /* Vcom-level amplitude = 1.23*Vreg1OUT | ||
135 | * VcomH-level amplitude = 0.84*Vreg1OUT */ | ||
136 | lcd_write_reg(R_POWER_CONTROL4, 0x3617); | ||
137 | lcd_write_reg(R_POWER_CONTROL3, 0x0008); /* Vreg1OUT = REGP*1.90 */ | ||
138 | lcd_write_reg(R_POWER_CONTROL1, 0x0004); /* Step-up circuit 1 ON */ | ||
139 | lcd_write_reg(R_POWER_CONTROL1, 0x0004); | ||
140 | 147 | ||
141 | lcd_write_reg(R_POWER_CONTROL2, 0x0002); /* VciOUT = 0.87*VciLVL */ | 148 | /* DC12-10 = 000b: Step-up1 = clock/8, |
142 | lcd_write_reg(R_POWER_CONTROL3, 0x0018); /* turn on VLOUT3 */ | 149 | * DC02-00 = 000b: Step-up2 = clock/16, |
143 | lcd_write_reg(R_POWER_CONTROL1, 0x0044); /* LCD power supply Op.Amp | 150 | * VC2-0 = 010b: VciOUT = 0.87 * VciLVL */ |
144 | const curr = 1 */ | 151 | lcd_write_reg(R_POWER_CONTROL2, 0x0002); |
145 | sleep(1); | ||
146 | 152 | ||
147 | /* Step-up rate: | 153 | /* VRH3-0 = 1000b: Vreg1OUT = REGP * 1.90 */ |
148 | * VLOUT1 (DDVDH) = Vci1*2 | 154 | lcd_write_reg(R_POWER_CONTROL3, 0x0008); |
149 | * VLOUT4 (VCL) = Vci1*(-1) | 155 | |
150 | * VLOUT2 (VGH) = DDVDH*3 = Vci1*6 | 156 | /* VDV4-0 = 00110b: VcomA = Vreg1OUT * 0.76, |
151 | * VLOUT3 (VGL) = - DDVDH*2 = Vci1*(-4) */ | 157 | * VCM4-0 = 10000b: VcomH = Vreg1OUT * 0.70*/ |
152 | lcd_write_reg(R_POWER_CONTROL1, 0x0144); | 158 | lcd_write_reg(R_POWER_CONTROL4, 0x0610); |
153 | 159 | ||
154 | /* Step-Up circuit 1 Off; | 160 | lcd_write_reg(R_POWER_CONTROL1, 0x0044); /* AP2-0 = 100b, DK = 1 */ |
155 | * VLOUT2 (VGH) = Vci1 + DDVDH*2 = Vci1*5 | 161 | lcd_write_reg(R_POWER_CONTROL3, 0x0018); /* PON = 1 */ |
156 | * VLOUT3 (VGL) = -(Vci1+DDVDH) = Vci1*(-3) */ | 162 | |
157 | lcd_write_reg(R_POWER_CONTROL1, 0x0540); | 163 | sleep(4); /* Step-up circuit stabilising time */ |
158 | 164 | ||
159 | /* Vcom-level ampl = Vreg1OUT*1.11 | 165 | /* start power supply */ |
160 | * VcomH-level ampl = Vreg1OUT*0.86 */ | 166 | |
161 | lcd_write_reg(R_POWER_CONTROL4, 0x3218); | 167 | lcd_write_reg(R_POWER_CONTROL1, 0x0540); /* BT2-0 = 101b, DK = 0 */ |
162 | /* ??Number lines invalid? */ | 168 | lcd_write_reg(R_POWER_CONTROL4, 0x2610); /* VCOMG = 1 */ |
163 | lcd_write_reg(R_DRV_OUTPUT_CONTROL, 0x001b); | 169 | |
164 | 170 | /* other settings */ | |
165 | /* B/C = 1 ; n-line inversion form; polarity inverses at completion of | 171 | |
166 | * driving n lines | 172 | /* B/C = 1: n-line inversion form |
167 | * Exclusive OR = 1; polarity inversion occurs by applying an EOR to | 173 | * EOR = 1: polarity inversion occurs by applying an EOR to odd/even |
168 | * odd/even frame select signal and an n-line inversion signal. | 174 | * frame select signal and an n-line inversion signal. |
169 | * FLD = 01b (1 field interlaced scan, external display iface) */ | 175 | * FLD = 01b: 1 field interlaced scan, external display iface */ |
170 | lcd_write_reg(R_DRV_WAVEFORM_CONTROL, 0x0700); | 176 | lcd_write_reg(R_DRV_WAVEFORM_CONTROL, 0x0700); |
171 | 177 | ||
172 | /* Address counter updated in vertical direction; left to right; | 178 | /* Address counter updated in vertical direction; left to right; |
@@ -176,55 +182,27 @@ void lcd_init_device(void) | |||
176 | * Replace data on writing to GRAM */ | 182 | * Replace data on writing to GRAM */ |
177 | lcd_write_reg(R_ENTRY_MODE, 0x7038); | 183 | lcd_write_reg(R_ENTRY_MODE, 0x7038); |
178 | 184 | ||
179 | /* ???? compare val = (1)1100 0011 0000b; the MSB bit is out of spec.*/ | 185 | flip_lcd(display_flipped); |
180 | lcd_write_reg(R_COMPARE_REG1, 0x7030); | ||
181 | lcd_write_reg(R_COMPARE_REG2, 0x0000); | ||
182 | |||
183 | lcd_write_reg(R_GATE_SCAN_POS, 0x0000); | ||
184 | lcd_write_reg(R_VERT_SCROLL_CONTROL, 0x0000); | ||
185 | 186 | ||
186 | /* Gate Line = 0+1 = 1 | ||
187 | * gate "end" line = 0xdb + 1 = 0xdc */ | ||
188 | lcd_write_reg(R_1ST_SCR_DRV_POS, 0xdb00); | ||
189 | lcd_write_reg(R_2ND_SCR_DRV_POS, 0x0000); | 187 | lcd_write_reg(R_2ND_SCR_DRV_POS, 0x0000); |
190 | lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 0xaf00);/* horiz ram addr 0 - 175 */ | 188 | lcd_write_reg(R_VERT_SCROLL_CONTROL, 0x0000); |
191 | lcd_write_reg(R_VERT_RAM_ADDR_POS, 0xdb00);/* vert ram addr 0 - 219 */ | ||
192 | 189 | ||
193 | /* 19 clocks,no equalization */ | 190 | /* 19 clocks,no equalization */ |
194 | lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x0002); | 191 | lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x0002); |
195 | 192 | ||
196 | /* Transfer mode for RGB interface disabled | 193 | /* Transfer mode for RGB interface disabled |
197 | * internal clock operation; | 194 | * internal clock operation; |
198 | * System interface/VSYNC interface */ | 195 | * System interface/VSYNC interface */ |
199 | lcd_write_reg(R_EXT_DISP_IF_CONTROL, 0x0003); | 196 | lcd_write_reg(R_EXT_DISP_IF_CONTROL, 0x0003); |
200 | sleep(1); | ||
201 | lcd_write_reg(R_POWER_CONTROL1, 0x4540); /* Turn on the op-amp (1) */ | ||
202 | |||
203 | /* Enable internal display operations, not showed on the ext. display yet | ||
204 | * Source: GND; Internal: ON; Gate-Driver control signals: ON*/ | ||
205 | lcd_write_reg(R_DISP_CONTROL1, 0x0041); | ||
206 | sleep(1); | ||
207 | 197 | ||
208 | /* Front porch lines: 8; Back porch lines: 8; */ | 198 | /* Front porch lines: 8; Back porch lines: 8; */ |
209 | lcd_write_reg(R_DISP_CONTROL2, 0x0808); | 199 | lcd_write_reg(R_DISP_CONTROL2, 0x0808); |
210 | 200 | ||
211 | /* Scan mode by the gate driver in the non-display area: disabled; | 201 | /* Scan mode by the gate driver in the non-display area: disabled; |
212 | * Cycle of scan by the gate driver - set to 31frames(518ms),disabled by | 202 | * Cycle of scan by the gate driver - set to 31frames(518ms), |
213 | * above setting */ | 203 | * disabled by above setting */ |
214 | lcd_write_reg(R_DISP_CONTROL3, 0x003f); | 204 | lcd_write_reg(R_DISP_CONTROL3, 0x003f); |
215 | sleep(1); | ||
216 | 205 | ||
217 | /* Vertical scrolling disabled; | ||
218 | * Gate Output: VGH/VGL; | ||
219 | * Reversed grayscale image on; | ||
220 | * Source output: Non-lit display; internal disp.operation: ON, gate-driver | ||
221 | * control signals: ON | ||
222 | * Note: bit 6 (zero based) isn't set to 1 (according to the datasheet | ||
223 | * it should be) */ | ||
224 | lcd_write_reg(R_DISP_CONTROL1, 0x0636); | ||
225 | sleep(1); | ||
226 | lcd_write_reg(R_DISP_CONTROL1, 0x0626);/* Gate output:VGL; 6th bit not set*/ | ||
227 | sleep(1); | ||
228 | lcd_write_reg(R_GAMMA_FINE_ADJ_POS1, 0x0003); | 206 | lcd_write_reg(R_GAMMA_FINE_ADJ_POS1, 0x0003); |
229 | lcd_write_reg(R_GAMMA_FINE_ADJ_POS2, 0x0707); | 207 | lcd_write_reg(R_GAMMA_FINE_ADJ_POS2, 0x0707); |
230 | lcd_write_reg(R_GAMMA_FINE_ADJ_POS3, 0x0007); | 208 | lcd_write_reg(R_GAMMA_FINE_ADJ_POS3, 0x0007); |
@@ -235,73 +213,72 @@ void lcd_init_device(void) | |||
235 | lcd_write_reg(R_GAMMA_GRAD_ADJ_NEG, 0x0507); | 213 | lcd_write_reg(R_GAMMA_GRAD_ADJ_NEG, 0x0507); |
236 | lcd_write_reg(R_GAMMA_AMP_ADJ_RES_POS, 0x1d09); | 214 | lcd_write_reg(R_GAMMA_AMP_ADJ_RES_POS, 0x1d09); |
237 | lcd_write_reg(R_GAMMA_AMP_AVG_ADJ_RES_NEG, 0x0303); | 215 | lcd_write_reg(R_GAMMA_AMP_AVG_ADJ_RES_NEG, 0x0303); |
238 | |||
239 | /* VcomH = Vreg1OUT*0.70 | ||
240 | * Vcom amplitude = Vreg1OUT*0.78 */ | ||
241 | lcd_write_reg(R_POWER_CONTROL4, 0x2610); | ||
242 | |||
243 | /* LCD ON | ||
244 | * Vertical scrolling: Originaly designated position/external display | ||
245 | * Reverse grayscale off; | ||
246 | * Internal display operation ON, Gate driver control signals: ON; Source | ||
247 | * output GND */ | ||
248 | lcd_write_reg(R_DISP_CONTROL1, 0x0061); | ||
249 | sleep(1); | ||
250 | 216 | ||
251 | /* init the GRAM, the framebuffer is already cleared in the | 217 | display_on=true; /* must be done before calling lcd_update() */ |
252 | * device independent lcd_init() */ | 218 | lcd_update(); |
253 | lcd_write_reg(R_RAM_ADDR_SET, 0); | 219 | |
254 | lcd_begin_write_gram(); | 220 | sleep(4); /* op-amp stabilising time */ |
255 | lcd_write_data((unsigned short *)lcd_framebuffer, LCD_WIDTH*LCD_HEIGHT); | ||
256 | 221 | ||
257 | /* Reverse grayscale on; | 222 | /** Sequence according to datasheet, p. 130 **/ |
258 | * Source output: display */ | 223 | |
259 | lcd_write_reg(R_DISP_CONTROL1, 0x0067); | 224 | lcd_write_reg(R_POWER_CONTROL1, 0x4540); /* SAP2-0=100, BT2-0=101, AP2-0=100 */ |
225 | lcd_write_reg(R_DISP_CONTROL1, 0x0005); /* GON=0, DTE=0, REV=1, D1-0=01 */ | ||
226 | sleep(2); | ||
227 | |||
228 | lcd_write_reg(R_DISP_CONTROL1, 0x0025); /* GON=1, DTE=0, REV=1, D1-0=01 */ | ||
229 | lcd_write_reg(R_DISP_CONTROL1, 0x0027); /* GON=1, DTE=0, REV=1, D1-0=11 */ | ||
230 | sleep(2); | ||
231 | |||
232 | lcd_write_reg(R_DISP_CONTROL1, 0x0037); /* GON=1, DTE=1, REV=1, D1-0=11 */ | ||
233 | } | ||
234 | |||
235 | /* LCD init */ | ||
236 | void lcd_init_device(void) | ||
237 | { | ||
238 | /* GPO46 is LCD RESET */ | ||
239 | or_l(0x00004000, &GPIO1_OUT); | ||
240 | or_l(0x00004000, &GPIO1_ENABLE); | ||
241 | or_l(0x00004000, &GPIO1_FUNCTION); | ||
242 | |||
243 | /* Reset LCD */ | ||
244 | and_l(~0x00004000, &GPIO1_OUT); | ||
245 | sleep(1); | ||
246 | or_l(0x00004000, &GPIO1_OUT); | ||
260 | sleep(1); | 247 | sleep(1); |
261 | 248 | ||
262 | /* Vertical Scrolling disabled | 249 | _display_on(); |
263 | * Gate output: VGH/VGL | ||
264 | * 6th bit not set*/ | ||
265 | lcd_write_reg(R_DISP_CONTROL1, 0x0637); | ||
266 | /* ok, the display is finally on */ | ||
267 | display_on=true; | ||
268 | } | 250 | } |
269 | 251 | ||
270 | void lcd_enable(bool on) | 252 | void lcd_enable(bool on) |
271 | { | 253 | { |
272 | if(display_on!=on) | 254 | if(display_on!=on) |
273 | { | 255 | { |
274 | if(on) | 256 | if(on) |
275 | { | 257 | { |
276 | lcd_init_device(); | 258 | _display_on(); |
277 | } | 259 | } |
278 | else | 260 | else |
279 | { | 261 | { |
280 | lcd_write_reg(R_FRAME_CYCLE_CONTROL,0x0002); /* No EQ, 19 clocks */ | 262 | /** Off sequence according to datasheet, p. 130 **/ |
281 | 263 | ||
282 | /* Gate Output VGH/VGL; Non-lit display internal disp. ON, | 264 | lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x0002); /* EQ=0, 18 clks/line */ |
283 | * gate-driver control ON; */ | 265 | lcd_write_reg(R_DISP_CONTROL1, 0x0036); /* GON=1, DTE=1, REV=1, D1-0=10 */ |
284 | lcd_write_reg(R_DISP_CONTROL1,0x0072); | 266 | sleep(2); |
285 | sleep(1); | 267 | |
286 | lcd_write_reg(R_DISP_CONTROL1,0x0062); /* Gate Output: VGL */ | 268 | lcd_write_reg(R_DISP_CONTROL1, 0x0026); /* GON=1, DTE=0, REV=1, D1-0=10 */ |
287 | sleep(1); | 269 | sleep(2); |
288 | 270 | ||
289 | /* Gate Output VGH; Source Output: GND; | 271 | lcd_write_reg(R_DISP_CONTROL1, 0x0000); /* GON=0, DTE=0, D1-0=00 */ |
290 | * internal display operation:halt | ||
291 | * Gate-Driver control signals: OFF */ | ||
292 | lcd_write_reg(R_DISP_CONTROL1,0x0040); | ||
293 | |||
294 | /* Now, turn off the power */ | ||
295 | 272 | ||
296 | /* Halt op. amp & step-up circuit */ | 273 | lcd_write_reg(R_POWER_CONTROL1, 0x0000); /* SAP2-0=000, AP2-0=000 */ |
297 | lcd_write_reg(R_POWER_CONTROL1,0x0000); | 274 | lcd_write_reg(R_POWER_CONTROL3, 0x0000); /* PON=0 */ |
298 | lcd_write_reg(R_POWER_CONTROL3,0x0000); /* Turn OFF VLOUT3 */ | 275 | lcd_write_reg(R_POWER_CONTROL4, 0x0000); /* VCOMG=0 */ |
276 | |||
277 | /* datasheet p. 131 */ | ||
278 | lcd_write_reg(R_POWER_CONTROL1, 0x0001); /* STB=1: standby mode */ | ||
299 | 279 | ||
300 | /* halt negative volt ampl. */ | ||
301 | lcd_write_reg(R_POWER_CONTROL4,0x0000); | ||
302 | display_on=false; | 280 | display_on=false; |
303 | } | 281 | } |
304 | /* display_on = on */ | ||
305 | } | 282 | } |
306 | } | 283 | } |
307 | 284 | ||
@@ -319,7 +296,7 @@ void lcd_blit(const fb_data* data, int x, int by, int width, | |||
319 | (void)width; | 296 | (void)width; |
320 | (void)bheight; | 297 | (void)bheight; |
321 | (void)stride; | 298 | (void)stride; |
322 | /*if(display_on)*/ | 299 | /*if(display_on)*/ |
323 | } | 300 | } |
324 | 301 | ||
325 | 302 | ||
@@ -329,8 +306,15 @@ void lcd_update(void) ICODE_ATTR; | |||
329 | void lcd_update(void) | 306 | void lcd_update(void) |
330 | { | 307 | { |
331 | if(display_on){ | 308 | if(display_on){ |
309 | /* reset update window */ | ||
310 | /* horiz ram addr: 0 - 175 */ | ||
311 | lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 0xaf00); | ||
312 | |||
313 | /* vert ram addr: 0 - 219 */ | ||
314 | lcd_write_reg(R_VERT_RAM_ADDR_POS,((xoffset+219)<<8) | xoffset); | ||
315 | |||
332 | /* Copy display bitmap to hardware */ | 316 | /* Copy display bitmap to hardware */ |
333 | lcd_write_reg(R_RAM_ADDR_SET, 0); | 317 | lcd_write_reg(R_RAM_ADDR_SET, xoffset << 8); |
334 | lcd_begin_write_gram(); | 318 | lcd_begin_write_gram(); |
335 | lcd_write_data((unsigned short *)lcd_framebuffer, LCD_WIDTH*LCD_HEIGHT); | 319 | lcd_write_data((unsigned short *)lcd_framebuffer, LCD_WIDTH*LCD_HEIGHT); |
336 | } | 320 | } |
@@ -353,11 +337,11 @@ void lcd_update_rect(int x, int y, int width, int height) | |||
353 | /* set update window */ | 337 | /* set update window */ |
354 | 338 | ||
355 | /* horiz ram addr */ | 339 | /* horiz ram addr */ |
356 | lcd_write_reg(R_HORIZ_RAM_ADDR_POS, (ymax<<8) | y); | 340 | lcd_write_reg(R_HORIZ_RAM_ADDR_POS, (ymax << 8) | y); |
357 | 341 | ||
358 | /* vert ram addr */ | 342 | /* vert ram addr */ |
359 | lcd_write_reg(R_VERT_RAM_ADDR_POS,((x+width-1)<<8) | x); | 343 | lcd_write_reg(R_VERT_RAM_ADDR_POS,((x+xoffset+width-1) << 8) | (x+xoffset)); |
360 | lcd_write_reg(R_RAM_ADDR_SET, (x<<8) | y); | 344 | lcd_write_reg(R_RAM_ADDR_SET, ((x+xoffset) << 8) | y); |
361 | lcd_begin_write_gram(); | 345 | lcd_begin_write_gram(); |
362 | 346 | ||
363 | /* Copy specified rectangle bitmap to hardware */ | 347 | /* Copy specified rectangle bitmap to hardware */ |
@@ -365,12 +349,5 @@ void lcd_update_rect(int x, int y, int width, int height) | |||
365 | { | 349 | { |
366 | lcd_write_data ((unsigned short *)&lcd_framebuffer[y][x], width); | 350 | lcd_write_data ((unsigned short *)&lcd_framebuffer[y][x], width); |
367 | } | 351 | } |
368 | |||
369 | /* reset update window */ | ||
370 | /* horiz ram addr: 0 - 175 */ | ||
371 | lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 0xaf00); | ||
372 | |||
373 | /* vert ram addr: 0 - 219 */ | ||
374 | lcd_write_reg(R_VERT_RAM_ADDR_POS, 0xdb00); | ||
375 | } | 352 | } |
376 | } | 353 | } |