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author | Dave Chapman <dave@dchapman.com> | 2006-02-20 22:46:58 +0000 |
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committer | Dave Chapman <dave@dchapman.com> | 2006-02-20 22:46:58 +0000 |
commit | 800023bc4e5468f89479556ded3afe96a226ca2b (patch) | |
tree | b263a4d9755d754adba3a4a32d0ed88ea1160a34 /firmware/drivers | |
parent | 831cfb8e44c7690d77ddae03e680cf01881bed5b (diff) | |
download | rockbox-800023bc4e5468f89479556ded3afe96a226ca2b.tar.gz rockbox-800023bc4e5468f89479556ded3afe96a226ca2b.zip |
iPod 5G: Bug fixes in DAC initialisation - playback is now stereo...
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@8755 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/drivers')
-rw-r--r-- | firmware/drivers/wm8758.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/firmware/drivers/wm8758.c b/firmware/drivers/wm8758.c index 3069b3cba7..ea670230b9 100644 --- a/firmware/drivers/wm8758.c +++ b/firmware/drivers/wm8758.c | |||
@@ -120,6 +120,8 @@ void wmcodec_enable_output(bool enable) | |||
120 | /* reset the I2S controller into known state */ | 120 | /* reset the I2S controller into known state */ |
121 | i2s_reset(); | 121 | i2s_reset(); |
122 | 122 | ||
123 | /* TODO: Review the power-up sequence to prevent pops */ | ||
124 | |||
123 | wm8758_write(RESET, 0x1ff); /*Reset*/ | 125 | wm8758_write(RESET, 0x1ff); /*Reset*/ |
124 | 126 | ||
125 | wm8758_write(PWRMGMT1, 0x2b); | 127 | wm8758_write(PWRMGMT1, 0x2b); |
@@ -129,7 +131,7 @@ void wmcodec_enable_output(bool enable) | |||
129 | wm8758_write(AINTFCE, 0x10); | 131 | wm8758_write(AINTFCE, 0x10); |
130 | wm8758_write(CLKCTRL, 0x49); | 132 | wm8758_write(CLKCTRL, 0x49); |
131 | 133 | ||
132 | wm8758_write(OUTCTRL, 1 | (0x3 << 5)); | 134 | wm8758_write(OUTCTRL, 1); |
133 | 135 | ||
134 | /* The iPod can handle multiple frequencies, but fix at 44.1KHz | 136 | /* The iPod can handle multiple frequencies, but fix at 44.1KHz |
135 | for now */ | 137 | for now */ |
@@ -248,7 +250,7 @@ void wmcodec_set_sample_rate(int sampling_control) | |||
248 | wm8758_write(PLLK3, 0x26); | 250 | wm8758_write(PLLK3, 0x26); |
249 | 251 | ||
250 | /* set clock div */ | 252 | /* set clock div */ |
251 | wm8758_write(CLKCTRL, 1 | (0 << 2) | (2 << 5) | (1 << 8)); | 253 | wm8758_write(CLKCTRL, 1 | (1 << 2) | (2 << 5) | (1 << 8)); |
252 | 254 | ||
253 | /* set srate */ | 255 | /* set srate */ |
254 | wm8758_write(SRATECTRL, (0 << 1)); | 256 | wm8758_write(SRATECTRL, (0 << 1)); |