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authorMichael Sevakis <jethead71@rockbox.org>2017-01-21 08:04:43 -0500
committerGerrit Rockbox <gerrit@rockbox.org>2017-01-25 00:05:13 +0100
commit783c77531c35e62dd754c510c4f2beefe6df4a9d (patch)
tree79e747eb1ba3716b56e5178145536f316c44e403 /firmware/drivers
parenta1d1832049146925400b57c4cd81b0739b674971 (diff)
downloadrockbox-783c77531c35e62dd754c510c4f2beefe6df4a9d.tar.gz
rockbox-783c77531c35e62dd754c510c4f2beefe6df4a9d.zip
AMS: Return ascodec to interrupt-based I2C2 driver
1. Slightly revised and regularized internal interface. Callback is used for read and write to provide completion signal instead of having two mechanisms. 2. Lower overhead for asynchronous or alterate completion callbacks. We now only init what is required by the transfer. A couple unneeded structure members were also nixed. 3. Fixes a bug that would neglect a semaphore wait if pumping the I2C interrupts in a loop when not in thread state or interrupts are masked. 4. Corrects broken initialization order by defining KDEV_INIT, which makes kernel_init() call kernel_device_init() to initialize additional devices _after_ the kernel, threading and synchronization objects are safe to use. 5. Locking set_cpu_frequency has to be done at the highest level in system.c to ensure the boost counter and the frequency are both set in agreement. Reconcile the locking inteface between PP and AMS (the only two currently using locking there) to keep it clean. Now works fine with voltages in GIT HEAD on my Fuze v2, type 0. Previously, everything crashed and died instantly. action.c calling set_cpu_frequency from a tick was part of it. The rest may have been related to 3. and 4. Honestly, I'm not certain! Testing by Mihail Zenkov indicates it solves our problems. This will get the developer builds running again after the kernel assert code push. Change-Id: Ie245994fb3e318dd5ef48e383ce61fdd977224d4
Diffstat (limited to 'firmware/drivers')
-rw-r--r--firmware/drivers/adc-as3514.c21
1 files changed, 19 insertions, 2 deletions
diff --git a/firmware/drivers/adc-as3514.c b/firmware/drivers/adc-as3514.c
index 3b411a379d..9a81a52cc7 100644
--- a/firmware/drivers/adc-as3514.c
+++ b/firmware/drivers/adc-as3514.c
@@ -26,18 +26,35 @@
26/* Read 10-bit channel data */ 26/* Read 10-bit channel data */
27unsigned short adc_read(int channel) 27unsigned short adc_read(int channel)
28{ 28{
29 unsigned char buf[2]; 29 unsigned short data = 0;
30
31 if ((unsigned)channel >= NUM_ADC_CHANNELS)
32 return 0;
30 33
31 ascodec_lock(); 34 ascodec_lock();
32 35
33 /* Select channel */ 36 /* Select channel */
34 ascodec_write(AS3514_ADC_0, (channel << 4)); 37 ascodec_write(AS3514_ADC_0, (channel << 4));
38 /*
39 * The AS3514 ADC will trigger an interrupt when the conversion
40 * is finished, if the corresponding enable bit in IRQ_ENRD2
41 * is set.
42 * Previously the code did not wait and this apparently did
43 * not pose any problems, but this should be more correct.
44 * Without the wait the data read back may be completely or
45 * partially (first one of the two bytes) stale.
46 */
47 ascodec_wait_adc_finished();
48
35 49
50 /* Read data */
51 unsigned char buf[2] = { 0, 0 };
36 ascodec_readbytes(AS3514_ADC_0, 2, buf); 52 ascodec_readbytes(AS3514_ADC_0, 2, buf);
53 data = (((buf[0] & 0x3) << 8) | buf[1]);
37 54
38 ascodec_unlock(); 55 ascodec_unlock();
39 56
40 return (((buf[0] & 0x3) << 8) | buf[1]); 57 return data;
41} 58}
42 59
43void adc_init(void) 60void adc_init(void)