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author | Linus Nielsen Feltzing <linus@haxx.se> | 2006-07-21 08:42:28 +0000 |
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committer | Linus Nielsen Feltzing <linus@haxx.se> | 2006-07-21 08:42:28 +0000 |
commit | ed4d7a33bdeba5ce11512ee617398a2840797203 (patch) | |
tree | 1027077148ace8e13c8fa49ae3794b2038a2d67a /firmware/drivers/uda1380.c | |
parent | e8818efbe9c814ad3b46ee0e5d0ae250b7c96cf4 (diff) | |
download | rockbox-ed4d7a33bdeba5ce11512ee617398a2840797203.tar.gz rockbox-ed4d7a33bdeba5ce11512ee617398a2840797203.zip |
Patch #5347 by Rani Hod - Adds FM radio and recording features to the iAudio X5.
Also includes a rewrite of the Coldfire I2C driver to include both read and write.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@10272 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/drivers/uda1380.c')
-rw-r--r-- | firmware/drivers/uda1380.c | 26 |
1 files changed, 12 insertions, 14 deletions
diff --git a/firmware/drivers/uda1380.c b/firmware/drivers/uda1380.c index ef19dcf1c5..241a117385 100644 --- a/firmware/drivers/uda1380.c +++ b/firmware/drivers/uda1380.c | |||
@@ -76,14 +76,13 @@ unsigned short uda1380_defaults[2*NUM_DEFAULT_REGS] = | |||
76 | /* Returns 0 if register was written or -1 if write failed */ | 76 | /* Returns 0 if register was written or -1 if write failed */ |
77 | int uda1380_write_reg(unsigned char reg, unsigned short value) | 77 | int uda1380_write_reg(unsigned char reg, unsigned short value) |
78 | { | 78 | { |
79 | unsigned char data[4]; | 79 | unsigned char data[3]; |
80 | 80 | ||
81 | data[0] = UDA1380_ADDR; | 81 | data[0] = reg; |
82 | data[1] = reg; | 82 | data[1] = value >> 8; |
83 | data[2] = value >> 8; | 83 | data[2] = value & 0xff; |
84 | data[3] = value & 0xff; | ||
85 | 84 | ||
86 | if (i2c_write(1, data, 4) != 4) | 85 | if (i2c_write(I2C_IFACE_0, UDA1380_ADDR, data, 3) != 3) |
87 | { | 86 | { |
88 | DEBUGF("uda1380 error reg=0x%x", reg); | 87 | DEBUGF("uda1380 error reg=0x%x", reg); |
89 | return -1; | 88 | return -1; |
@@ -322,21 +321,20 @@ void uda1380_set_recvol(int left, int right, int type) | |||
322 | { | 321 | { |
323 | /* for this order we can combine both registers, | 322 | /* for this order we can combine both registers, |
324 | making the glitch even smaller */ | 323 | making the glitch even smaller */ |
325 | unsigned char data[6]; | 324 | unsigned char data[5]; |
326 | unsigned short value_dec; | 325 | unsigned short value_dec; |
327 | unsigned short value_pga; | 326 | unsigned short value_pga; |
328 | value_dec = DEC_VOLL(left) | DEC_VOLR(right); | 327 | value_dec = DEC_VOLL(left) | DEC_VOLR(right); |
329 | value_pga = (uda1380_regs[REG_PGA] & ~PGA_GAIN_MASK) | 328 | value_pga = (uda1380_regs[REG_PGA] & ~PGA_GAIN_MASK) |
330 | | PGA_GAINL(left_ag) | PGA_GAINR(right_ag); | 329 | | PGA_GAINL(left_ag) | PGA_GAINR(right_ag); |
331 | 330 | ||
332 | data[0] = UDA1380_ADDR; | 331 | data[0] = REG_DEC_VOL; |
333 | data[1] = REG_DEC_VOL; | 332 | data[1] = value_dec >> 8; |
334 | data[2] = value_dec >> 8; | 333 | data[2] = value_dec & 0xff; |
335 | data[3] = value_dec & 0xff; | 334 | data[3] = value_pga >> 8; |
336 | data[4] = value_pga >> 8; | 335 | data[4] = value_pga & 0xff; |
337 | data[5] = value_pga & 0xff; | ||
338 | 336 | ||
339 | if (i2c_write(1, data, 6) != 6) | 337 | if (i2c_write(I2C_IFACE_0, UDA1380_ADDR, data, 5) != 5) |
340 | { | 338 | { |
341 | DEBUGF("uda1380 error reg=combi rec gain"); | 339 | DEBUGF("uda1380 error reg=combi rec gain"); |
342 | } | 340 | } |