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author | Michael Sevakis <jethead71@rockbox.org> | 2009-01-22 22:05:04 +0000 |
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committer | Michael Sevakis <jethead71@rockbox.org> | 2009-01-22 22:05:04 +0000 |
commit | da76a3469437261bd8857c6eddeaafcc601f373e (patch) | |
tree | 33e6c461aeb03d28575166c5ed5002aaf8ea9741 /firmware/drivers/tuner | |
parent | 81df953da55e75632b5efbe676f2b348e11b2c4b (diff) | |
download | rockbox-da76a3469437261bd8857c6eddeaafcc601f373e.tar.gz rockbox-da76a3469437261bd8857c6eddeaafcc601f373e.zip |
Use bus reset detection for all ARC OTG devices. Remove conflict from LV24020LP driver with some GPIO-by-number macros for PP502x. Start monitoring for USB stack once all core threads and queues are created otherwise queues will likely be registered after USB acks. Putting PP502x system_reboot in IRAM (unmapped, uncached) memory seems to help it work more consistently. Hopefully I got all the PP USB connect handlers in the right spot in irq_handler. If device seems unresponsive to cable, check there first.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19819 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/drivers/tuner')
-rw-r--r-- | firmware/drivers/tuner/lv24020lp.c | 41 |
1 files changed, 21 insertions, 20 deletions
diff --git a/firmware/drivers/tuner/lv24020lp.c b/firmware/drivers/tuner/lv24020lp.c index 0f05d90ea2..9d6425b962 100644 --- a/firmware/drivers/tuner/lv24020lp.c +++ b/firmware/drivers/tuner/lv24020lp.c | |||
@@ -61,16 +61,17 @@ static int fd_log = -1; | |||
61 | /** tuner register defines **/ | 61 | /** tuner register defines **/ |
62 | 62 | ||
63 | #if defined(SANSA_E200) || defined(SANSA_C200) | 63 | #if defined(SANSA_E200) || defined(SANSA_C200) |
64 | #define GPIO_OUTPUT_EN GPIOH_OUTPUT_EN | 64 | #define TUNER_GPIO_OUTPUT_EN GPIOH_OUTPUT_EN |
65 | #define GPIO_OUTPUT_VAL GPIOH_OUTPUT_VAL | 65 | #define TUNER_GPIO_OUTPUT_VAL GPIOH_OUTPUT_VAL |
66 | #define GPIO_INPUT_VAL GPIOH_INPUT_VAL | 66 | #define TUNER_GPIO_INPUT_VAL GPIOH_INPUT_VAL |
67 | #define FM_NRW_PIN 3 | 67 | #define FM_NRW_PIN 3 |
68 | #define FM_CLOCK_PIN 4 | 68 | #define FM_CLOCK_PIN 4 |
69 | #define FM_DATA_PIN 5 | 69 | #define FM_DATA_PIN 5 |
70 | |||
70 | #elif defined(IAUDIO_7) | 71 | #elif defined(IAUDIO_7) |
71 | #define GPIO_OUTPUT_EN GPIOA_DIR | 72 | #define TUNER_GPIO_OUTPUT_EN GPIOA_DIR |
72 | #define GPIO_OUTPUT_VAL GPIOA | 73 | #define TUNER_GPIO_OUTPUT_VAL GPIOA |
73 | #define GPIO_INPUT_VAL GPIOA | 74 | #define TUNER_GPIO_INPUT_VAL GPIOA |
74 | #define FM_CLOCK_PIN 5 | 75 | #define FM_CLOCK_PIN 5 |
75 | #define FM_DATA_PIN 6 | 76 | #define FM_DATA_PIN 6 |
76 | #define FM_NRW_PIN 7 | 77 | #define FM_NRW_PIN 7 |
@@ -83,9 +84,9 @@ static void udelay(int usecs) | |||
83 | } | 84 | } |
84 | 85 | ||
85 | #elif defined(COWON_D2) | 86 | #elif defined(COWON_D2) |
86 | #define GPIO_OUTPUT_EN GPIOC_DIR | 87 | #define TUNER_GPIO_OUTPUT_EN GPIOC_DIR |
87 | #define GPIO_OUTPUT_VAL GPIOC | 88 | #define TUNER_GPIO_OUTPUT_VAL GPIOC |
88 | #define GPIO_INPUT_VAL GPIOC | 89 | #define TUNER_GPIO_INPUT_VAL GPIOC |
89 | #define FM_NRW_PIN 31 | 90 | #define FM_NRW_PIN 31 |
90 | #define FM_CLOCK_PIN 29 | 91 | #define FM_CLOCK_PIN 29 |
91 | #define FM_DATA_PIN 30 | 92 | #define FM_DATA_PIN 30 |
@@ -292,16 +293,16 @@ static void lv24020lp_send_byte(unsigned int byte) | |||
292 | 293 | ||
293 | for (i = 0; i < 8; i++) | 294 | for (i = 0; i < 8; i++) |
294 | { | 295 | { |
295 | GPIO_OUTPUT_VAL &= ~(1 << FM_CLOCK_PIN); | 296 | TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_CLOCK_PIN); |
296 | 297 | ||
297 | if (byte & 1) | 298 | if (byte & 1) |
298 | GPIO_OUTPUT_VAL |= (1 << FM_DATA_PIN); | 299 | TUNER_GPIO_OUTPUT_VAL |= (1 << FM_DATA_PIN); |
299 | else | 300 | else |
300 | GPIO_OUTPUT_VAL &= ~(1 << FM_DATA_PIN); | 301 | TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_DATA_PIN); |
301 | 302 | ||
302 | udelay(FM_CLK_DELAY); | 303 | udelay(FM_CLK_DELAY); |
303 | 304 | ||
304 | GPIO_OUTPUT_VAL |= (1 << FM_CLOCK_PIN); | 305 | TUNER_GPIO_OUTPUT_VAL |= (1 << FM_CLOCK_PIN); |
305 | udelay(FM_CLK_DELAY); | 306 | udelay(FM_CLK_DELAY); |
306 | 307 | ||
307 | byte >>= 1; | 308 | byte >>= 1; |
@@ -312,8 +313,8 @@ static void lv24020lp_send_byte(unsigned int byte) | |||
312 | static void lv24020lp_end_write(void) | 313 | static void lv24020lp_end_write(void) |
313 | { | 314 | { |
314 | /* switch back to read mode */ | 315 | /* switch back to read mode */ |
315 | GPIO_OUTPUT_EN &= ~(1 << FM_DATA_PIN); | 316 | TUNER_GPIO_OUTPUT_EN &= ~(1 << FM_DATA_PIN); |
316 | GPIO_OUTPUT_VAL &= ~(1 << FM_NRW_PIN); | 317 | TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_NRW_PIN); |
317 | udelay(FM_CLK_DELAY); | 318 | udelay(FM_CLK_DELAY); |
318 | } | 319 | } |
319 | 320 | ||
@@ -327,8 +328,8 @@ static unsigned int lv24020lp_begin_write(unsigned int address) | |||
327 | for (;;) | 328 | for (;;) |
328 | { | 329 | { |
329 | /* Prepare 3-wire bus pins for write cycle */ | 330 | /* Prepare 3-wire bus pins for write cycle */ |
330 | GPIO_OUTPUT_VAL |= (1 << FM_NRW_PIN); | 331 | TUNER_GPIO_OUTPUT_VAL |= (1 << FM_NRW_PIN); |
331 | GPIO_OUTPUT_EN |= (1 << FM_DATA_PIN); | 332 | TUNER_GPIO_OUTPUT_EN |= (1 << FM_DATA_PIN); |
332 | udelay(FM_CLK_DELAY); | 333 | udelay(FM_CLK_DELAY); |
333 | 334 | ||
334 | /* current block == register block? */ | 335 | /* current block == register block? */ |
@@ -419,13 +420,13 @@ static unsigned int lv24020lp_read(unsigned int address) | |||
419 | toread = 0; | 420 | toread = 0; |
420 | for (i = 0; i < 8; i++) | 421 | for (i = 0; i < 8; i++) |
421 | { | 422 | { |
422 | GPIO_OUTPUT_VAL &= ~(1 << FM_CLOCK_PIN); | 423 | TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_CLOCK_PIN); |
423 | udelay(FM_CLK_DELAY); | 424 | udelay(FM_CLK_DELAY); |
424 | 425 | ||
425 | if (GPIO_INPUT_VAL & (1 << FM_DATA_PIN)) | 426 | if (TUNER_GPIO_INPUT_VAL & (1 << FM_DATA_PIN)) |
426 | toread |= (1 << i); | 427 | toread |= (1 << i); |
427 | 428 | ||
428 | GPIO_OUTPUT_VAL |= (1 << FM_CLOCK_PIN); | 429 | TUNER_GPIO_OUTPUT_VAL |= (1 << FM_CLOCK_PIN); |
429 | udelay(FM_CLK_DELAY); | 430 | udelay(FM_CLK_DELAY); |
430 | } | 431 | } |
431 | 432 | ||