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authorAndrew Ryabinin <ryabinin.a.a@gmail.com>2013-06-02 23:03:26 +0400
committerAndrew Ryabinin <ryabinin.a.a@gmail.com>2013-11-05 09:59:45 +0400
commit3a97e12fc58bd413c81d827c7b32a8cfd08b4d2b (patch)
tree4a827d570ab32161783d9327a748d87f601605c5 /firmware/drivers/audio/pcm1792.c
parenta170c99170589488531f7f576ad5e248b1c7c589 (diff)
downloadrockbox-3a97e12fc58bd413c81d827c7b32a8cfd08b4d2b.tar.gz
rockbox-3a97e12fc58bd413c81d827c7b32a8cfd08b4d2b.zip
Introduce HiFi E.T. MA8/MA8C ports.
HiFi E.T. MA8 is almost the same as MA9 except another DAC(pcm1792 in ma8, df1704 in ma9). MA8 has ILI9342 lcd, MA8C has ILI9342C lcd. Change-Id: If2ac04f5a3382590b2a392c46286559f54b2ed6a
Diffstat (limited to 'firmware/drivers/audio/pcm1792.c')
-rw-r--r--firmware/drivers/audio/pcm1792.c133
1 files changed, 133 insertions, 0 deletions
diff --git a/firmware/drivers/audio/pcm1792.c b/firmware/drivers/audio/pcm1792.c
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+++ b/firmware/drivers/audio/pcm1792.c
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1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2013 Andrew Ryabinin
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "system.h"
23#include "pcm1792.h"
24#include "config.h"
25#include "audio.h"
26#include "audiohw.h"
27
28/* pcm1792 registers initial values */
29#define REG18_INIT_VALUE (PCM1792_ATLD_OFF|PCM1792_FMT_16_I2S| \
30 PCM1792_DMF_DISABLE|PCM1792_DME_OFF)
31
32#define REG19_INIT_VALUE (PCM1792_REV_ON|PCM1792_ATS_DIV1| \
33 PCM1792_OPE_ON|PCM1792_DFMS_MONO| \
34 PCM1792_FLT_SHARP|PCM1792_INZD_OFF)
35
36#define REG20_INIT_VALUE (PCM1792_SRST_NORMAL|PCM1792_DSD_OFF|\
37 PCM1792_DFTH_ENABLE|PCM1792_STEREO|\
38 PCM1792_OS_64)
39
40#define REG21_INIT_VALUE (PCM1792_DZ_DISABLE|PCM1792_PCMZ_ON)
41
42
43static void pcm1792_write_reg(const int reg, const unsigned int value)
44{
45 int i;
46
47 pcm1792_set_ml_dir(0);
48 pcm1792_set_md(1);
49 pcm1792_set_mc(0);
50 pcm1792_set_ml(0);
51
52 for (i = (1<<15); i; i >>= 1) {
53 udelay(40);
54 pcm1792_set_mc(0);
55
56 if ((reg|value) & i) {
57 pcm1792_set_md(1);
58 } else {
59 pcm1792_set_md(0);
60 }
61
62 udelay(40);
63 pcm1792_set_mc(1);
64 }
65
66 udelay(40);
67 pcm1792_set_ml(1);
68 pcm1792_set_mc(0);
69 udelay(130);
70 pcm1792_set_md(1);
71}
72
73static int vol_tenthdb2hw(const int tdb)
74{
75 if (tdb < PCM1792_VOLUME_MIN) {
76 return 0;
77 } else if (tdb > PCM1792_VOLUME_MAX) {
78 return 0xff;
79 } else {
80 return (tdb/5+0xff);
81 }
82}
83
84
85void audiohw_init(void)
86{
87 pcm1792_write_reg(PCM1792_REG(18), REG18_INIT_VALUE);
88 pcm1792_write_reg(PCM1792_REG(19), REG19_INIT_VALUE);
89 pcm1792_write_reg(PCM1792_REG(20), REG20_INIT_VALUE);
90 pcm1792_write_reg(PCM1792_REG(21), REG21_INIT_VALUE);
91
92 /* Left & Right volumes */
93 pcm1792_write_reg(PCM1792_REG(16), 0xff);
94 pcm1792_write_reg(PCM1792_REG(17), 0xff);
95}
96
97void audiohw_mute(void)
98{
99 pcm1792_write_reg(PCM1792_REG(18), REG18_INIT_VALUE|PCM1792_MUTE_ON);
100}
101
102void audiohw_unmute(void)
103{
104 pcm1792_write_reg(PCM1792_REG(18), REG18_INIT_VALUE);
105}
106
107void audiohw_preinit(void)
108{
109}
110
111void audiohw_set_frequency(int fsel)
112{
113 (void)fsel;
114}
115
116void audiohw_set_volume(int vol_l, int vol_r)
117{
118 pcm1792_write_reg(PCM1792_REG(16), vol_tenthdb2hw(vol_l));
119 pcm1792_write_reg(PCM1792_REG(17), vol_tenthdb2hw(vol_r));
120}
121
122void audiohw_set_filter_roll_off(int value)
123{
124 if (value == 0) {
125 pcm1792_write_reg(PCM1792_REG(19),
126 REG19_INIT_VALUE
127 |PCM1792_FLT_SHARP);
128 } else {
129 pcm1792_write_reg(PCM1792_REG(19),
130 REG19_INIT_VALUE
131 |PCM1792_FLT_SLOW);
132 }
133}