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authorKarl Kurbjun <kkurbjun@gmail.com>2007-11-11 19:13:09 +0000
committerKarl Kurbjun <kkurbjun@gmail.com>2007-11-11 19:13:09 +0000
commit1b3dac90429a870f6ab84755dd78e525265b2bfe (patch)
tree53cc1ab755e54e2afab910a7a967f73096caa48f /firmware/app.lds
parent6e36ac547c23c3890439a3b81772d7e3c1ce938d (diff)
downloadrockbox-1b3dac90429a870f6ab84755dd78e525265b2bfe.tar.gz
rockbox-1b3dac90429a870f6ab84755dd78e525265b2bfe.zip
Setup the gigabeat so that iram is faked in a different spot since the normal iram location does not seem to be working. This lays the groundwork to get rolo running.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15581 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/app.lds')
-rw-r--r--firmware/app.lds32
1 files changed, 15 insertions, 17 deletions
diff --git a/firmware/app.lds b/firmware/app.lds
index e3f6ef2e50..7eeb0fcaa0 100644
--- a/firmware/app.lds
+++ b/firmware/app.lds
@@ -32,16 +32,6 @@ INPUT(target/sh/crt0.o)
32#define STUBOFFSET 0 32#define STUBOFFSET 0
33#endif 33#endif
34 34
35#if CONFIG_CPU==S3C2440
36#include "s3c2440.h"
37#define DRAMSIZE (MEMORYSIZE * 0x100000) - 0x100 - PLUGINSIZE - STUBOFFSET - CODECSIZE - LCD_BUFFER_SIZE - TTB_SIZE
38#elif CONFIG_CPU==DM320
39#include "dm320.h"
40#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE - LCD_BUFFER_SIZE - TTB_SIZE
41#else
42#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE
43#endif
44
45#if defined(IRIVER_H100_SERIES) || defined(IRIVER_H300) 35#if defined(IRIVER_H100_SERIES) || defined(IRIVER_H300)
46#define DRAMORIG 0x31000000 + STUBOFFSET 36#define DRAMORIG 0x31000000 + STUBOFFSET
47#define IRAMORIG 0x10000000 37#define IRAMORIG 0x10000000
@@ -62,9 +52,8 @@ INPUT(target/sh/crt0.o)
62#define IRAMSIZE 0x7000 52#define IRAMSIZE 0x7000
63#elif CONFIG_CPU==S3C2440 53#elif CONFIG_CPU==S3C2440
64#define DRAMORIG 0x00000100 + STUBOFFSET 54#define DRAMORIG 0x00000100 + STUBOFFSET
65#define IRAMORIG DRAMORIG
66#define IRAM DRAM
67#define IRAMSIZE 0x1000 55#define IRAMSIZE 0x1000
56#define IRAMORIG (MEMORYSIZE * 0x100000) - IRAMSIZE - LCD_BUFFER_SIZE - TTB_SIZE
68#elif CONFIG_CPU==DM320 57#elif CONFIG_CPU==DM320
69#define DRAMORIG 0x00900000 + STUBOFFSET 58#define DRAMORIG 0x00900000 + STUBOFFSET
70#define IRAMORIG 0x00000000 59#define IRAMORIG 0x00000000
@@ -79,6 +68,16 @@ INPUT(target/sh/crt0.o)
79#define IRAMSIZE 0x1000 68#define IRAMSIZE 0x1000
80#endif 69#endif
81 70
71#if CONFIG_CPU==S3C2440
72#include "s3c2440.h"
73#define DRAMSIZE (MEMORYSIZE * 0x100000) - 0x100 - PLUGINSIZE - STUBOFFSET - CODECSIZE - LCD_BUFFER_SIZE - TTB_SIZE - IRAMSIZE
74#elif CONFIG_CPU==DM320
75#include "dm320.h"
76#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE - LCD_BUFFER_SIZE - TTB_SIZE
77#else
78#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE
79#endif
80
82/* End of the audio buffer, where the codec buffer starts */ 81/* End of the audio buffer, where the codec buffer starts */
83#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE) 82#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE)
84 83
@@ -88,9 +87,8 @@ INPUT(target/sh/crt0.o)
88MEMORY 87MEMORY
89{ 88{
90 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE 89 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
91#if CONFIG_CPU != S3C2440
92 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE 90 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
93#endif 91
94#if CONFIG_CPU==PNX0101 92#if CONFIG_CPU==PNX0101
95 IRAM0 : ORIGIN = IRAM0ORIG, LENGTH = IRAM0SIZE 93 IRAM0 : ORIGIN = IRAM0ORIG, LENGTH = IRAM0SIZE
96#endif 94#endif
@@ -234,14 +232,14 @@ SECTIONS
234 232
235 _vectorscopy = LOADADDR(.vectors); 233 _vectorscopy = LOADADDR(.vectors);
236 234
237 .iram : 235 .iram IRAMORIG :
238 { 236 {
239 _iramstart = .; 237 _iramstart = .;
240 *(.icode) 238 *(.icode)
241 *(.irodata) 239 *(.irodata)
242 *(.idata) 240 *(.idata)
243 _iramend = .; 241 _iramend = .;
244 } > DRAM 242 } >IRAM AT> DRAM
245 243
246 _iramcopy = LOADADDR(.iram); 244 _iramcopy = LOADADDR(.iram);
247 245
@@ -253,7 +251,7 @@ SECTIONS
253 _iend = .; 251 _iend = .;
254 } > DRAM 252 } > DRAM
255 253
256 .stack : 254 .stack ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors) :
257 { 255 {
258 *(.stack) 256 *(.stack)
259 stackbegin = .; 257 stackbegin = .;