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authorMaurus Cuelenaere <mcuelenaere@gmail.com>2009-02-04 17:33:19 +0000
committerMaurus Cuelenaere <mcuelenaere@gmail.com>2009-02-04 17:33:19 +0000
commit9b13a5d151a14ba7a5b8c502763cb56356260ceb (patch)
tree854f056a73a8eceb06ce08a3a74de75121b37350 /firmware/SOURCES
parent01bd736e000856ded49023ccdd4ed62b96f300ff (diff)
downloadrockbox-9b13a5d151a14ba7a5b8c502763cb56356260ceb.tar.gz
rockbox-9b13a5d151a14ba7a5b8c502763cb56356260ceb.zip
MIPS:
* Add assembly optimised variants for memcpy, memset and find_first_set_bit * Add option to map_address in MMU to set caching algorithm git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19920 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/SOURCES')
-rw-r--r--firmware/SOURCES10
1 files changed, 4 insertions, 6 deletions
diff --git a/firmware/SOURCES b/firmware/SOURCES
index 46c46c2ce2..c08d8f2d66 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -400,15 +400,13 @@ target/arm/crt0.S
400 400
401#elif defined(CPU_MIPS) 401#elif defined(CPU_MIPS)
402#undef mips 402#undef mips
403/*target/mips/memcpy.S 403/*target/mips/strlen.S*/
404target/mips/memset.S
405common/memset16.c
406target/mips/strlen.S*/
407common/memcpy.c
408common/memmove.c 404common/memmove.c
409common/memset.c
410common/memset16.c 405common/memset16.c
411common/strlen.c 406common/strlen.c
407target/mips/ffs-mips.S
408target/mips/memcpy-mips.S
409target/mips/memset-mips.S
412target/mips/mmu-mips.c 410target/mips/mmu-mips.c
413#if CONFIG_CPU==JZ4732 411#if CONFIG_CPU==JZ4732
414target/mips/ingenic_jz47xx/crt0.S 412target/mips/ingenic_jz47xx/crt0.S