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authorDaniel Stenberg <daniel@haxx.se>2005-02-02 21:57:40 +0000
committerDaniel Stenberg <daniel@haxx.se>2005-02-02 21:57:40 +0000
commit1d395ae8a922bf53612f74f40a8cced859963ced (patch)
tree244b39ee17d1b9f2a44fd2624ad6d49c548de133 /apps
parentdea2434f3ca03d891cf76d79852b8f8c02f5e6e8 (diff)
downloadrockbox-1d395ae8a922bf53612f74f40a8cced859963ced.tar.gz
rockbox-1d395ae8a922bf53612f74f40a8cced859963ced.zip
made lots of code conditional on SH or MAS
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5750 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'apps')
-rw-r--r--apps/debug_menu.c18
1 files changed, 16 insertions, 2 deletions
diff --git a/apps/debug_menu.c b/apps/debug_menu.c
index 5f1b5af241..0637d0ce8a 100644
--- a/apps/debug_menu.c
+++ b/apps/debug_menu.c
@@ -291,6 +291,7 @@ bool dbg_flash_id(unsigned* p_manufacturer, unsigned* p_device,
291#ifdef HAVE_LCD_BITMAP 291#ifdef HAVE_LCD_BITMAP
292bool dbg_hw_info(void) 292bool dbg_hw_info(void)
293{ 293{
294#if CONFIG_CPU == SH7034
294 char buf[32]; 295 char buf[32];
295 int button; 296 int button;
296 int usb_polarity; 297 int usb_polarity;
@@ -383,7 +384,7 @@ bool dbg_hw_info(void)
383 if(button == SETTINGS_CANCEL) 384 if(button == SETTINGS_CANCEL)
384 return false; 385 return false;
385 } 386 }
386 387#endif /* CONFIG_CPU == SH7034 */
387 return false; 388 return false;
388} 389}
389#else 390#else
@@ -541,6 +542,7 @@ bool dbg_partitions(void)
541/* Test code!!! */ 542/* Test code!!! */
542bool dbg_ports(void) 543bool dbg_ports(void)
543{ 544{
545#if CONFIG_CPU == SH7034
544 unsigned short porta; 546 unsigned short porta;
545 unsigned short portb; 547 unsigned short portb;
546 unsigned char portc; 548 unsigned char portc;
@@ -595,6 +597,7 @@ bool dbg_ports(void)
595 return false; 597 return false;
596 } 598 }
597 } 599 }
600#endif /* CONFIG_CPU == SH7034 */
598 return false; 601 return false;
599} 602}
600#else 603#else
@@ -753,6 +756,8 @@ bool dbg_rtc(void)
753} 756}
754#endif 757#endif
755 758
759#if CONFIG_HWCODEC != MASNONE
760
756#ifdef HAVE_LCD_CHARCELLS 761#ifdef HAVE_LCD_CHARCELLS
757#define NUMROWS 1 762#define NUMROWS 1
758#else 763#else
@@ -797,6 +802,7 @@ bool dbg_mas(void)
797 } 802 }
798 return false; 803 return false;
799} 804}
805#endif /* CONFIG_HWCODEC != MASNONE */
800 806
801#if (CONFIG_HWCODEC == MAS3587F) || (CONFIG_HWCODEC == MAS3539F) 807#if (CONFIG_HWCODEC == MAS3587F) || (CONFIG_HWCODEC == MAS3539F)
802bool dbg_mas_codec(void) 808bool dbg_mas_codec(void)
@@ -1548,6 +1554,7 @@ static bool dbg_disk_info(void)
1548} 1554}
1549#endif 1555#endif
1550 1556
1557#if CONFIG_CPU == SH7034
1551bool dbg_save_roms(void) 1558bool dbg_save_roms(void)
1552{ 1559{
1553 int fd; 1560 int fd;
@@ -1570,6 +1577,7 @@ bool dbg_save_roms(void)
1570 system_memory_guard(oldmode); 1577 system_memory_guard(oldmode);
1571 return false; 1578 return false;
1572} 1579}
1580#endif /* CONFIG_CPU == SH7034 */
1573 1581
1574#ifdef CONFIG_TUNER 1582#ifdef CONFIG_TUNER
1575extern int debug_fm_detection; 1583extern int debug_fm_detection;
@@ -1619,6 +1627,7 @@ bool dbg_screendump(void)
1619} 1627}
1620#endif 1628#endif
1621 1629
1630#if CONFIG_CPU == SH7034
1622bool dbg_set_memory_guard(void) 1631bool dbg_set_memory_guard(void)
1623{ 1632{
1624 static const struct opt_items names[MAXMEMGUARD] = { 1633 static const struct opt_items names[MAXMEMGUARD] = {
@@ -1633,6 +1642,7 @@ bool dbg_set_memory_guard(void)
1633 1642
1634 return false; 1643 return false;
1635} 1644}
1645#endif /* CONFIG_CPU == SH7034 */
1636 1646
1637bool debug_menu(void) 1647bool debug_menu(void)
1638{ 1648{
@@ -1640,6 +1650,7 @@ bool debug_menu(void)
1640 bool result; 1650 bool result;
1641 1651
1642 static const struct menu_item items[] = { 1652 static const struct menu_item items[] = {
1653#if CONFIG_CPU == SH7034
1643 { "Dump ROM contents", dbg_save_roms }, 1654 { "Dump ROM contents", dbg_save_roms },
1644 { "View I/O ports", dbg_ports }, 1655 { "View I/O ports", dbg_ports },
1645#ifdef HAVE_LCD_BITMAP 1656#ifdef HAVE_LCD_BITMAP
@@ -1647,12 +1658,15 @@ bool debug_menu(void)
1647 { "View/clr RTC RAM", dbg_rtc }, 1658 { "View/clr RTC RAM", dbg_rtc },
1648#endif /* HAVE_RTC */ 1659#endif /* HAVE_RTC */
1649#endif /* HAVE_LCD_BITMAP */ 1660#endif /* HAVE_LCD_BITMAP */
1650 { "View OS stacks", dbg_os },
1651 { "Catch mem accesses", dbg_set_memory_guard }, 1661 { "Catch mem accesses", dbg_set_memory_guard },
1662#endif /* CONFIG_CPU == SH7034 */
1663 { "View OS stacks", dbg_os },
1652#if CONFIG_HWCODEC == MAS3507D 1664#if CONFIG_HWCODEC == MAS3507D
1653 { "View MAS info", dbg_mas_info }, 1665 { "View MAS info", dbg_mas_info },
1654#endif 1666#endif
1667#if CONFIG_HWCODEC != MASNONE
1655 { "View MAS regs", dbg_mas }, 1668 { "View MAS regs", dbg_mas },
1669#endif
1656#if (CONFIG_HWCODEC == MAS3587F) || (CONFIG_HWCODEC == MAS3539F) 1670#if (CONFIG_HWCODEC == MAS3587F) || (CONFIG_HWCODEC == MAS3539F)
1657 { "View MAS codec", dbg_mas_codec }, 1671 { "View MAS codec", dbg_mas_codec },
1658#endif 1672#endif