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authorSolomon Peachy <pizza@shaftnet.org>2020-07-15 19:40:55 -0400
committerSolomon Peachy <pizza@shaftnet.org>2020-07-24 21:20:13 +0000
commit092c340a2062fa98b7387fc5fd63578ddae7d0b6 (patch)
tree98ec96946eeb2ae709cb0528cc6998e21bb9b290 /apps/recorder/resize.h
parent17f7cc92c258bc456a27c3e7c5a19c9409851879 (diff)
downloadrockbox-092c340a2062fa98b7387fc5fd63578ddae7d0b6.tar.gz
rockbox-092c340a2062fa98b7387fc5fd63578ddae7d0b6.zip
[1/4] Remove SH support and all archos targets
This removes all code specific to SH targets Change-Id: I7980523785d2596e65c06430f4638eec74a06061
Diffstat (limited to 'apps/recorder/resize.h')
-rw-r--r--apps/recorder/resize.h56
1 files changed, 0 insertions, 56 deletions
diff --git a/apps/recorder/resize.h b/apps/recorder/resize.h
index 7e0a991eea..0282a17197 100644
--- a/apps/recorder/resize.h
+++ b/apps/recorder/resize.h
@@ -43,59 +43,7 @@
43#define MAX_SC_STACK_ALLOC 0 43#define MAX_SC_STACK_ALLOC 0
44#define HAVE_UPSCALER 1 44#define HAVE_UPSCALER 1
45 45
46#if defined(CPU_SH)
47/* perform 32x32->40 unsigned multiply, round off and return top 8 bits */
48static inline uint32_t sc_mul_u32_rnd(uint32_t m, uint32_t n)
49{
50 unsigned r, t1, t2, t3;
51 unsigned h = 1 << 15;
52 /* notation:
53 m = ab, n = cd
54 final result is (((a *c) << 32) + ((b * c + a * d) << 16) + b * d +
55 (1 << 31)) >> 32
56 */
57 asm (
58 "swap.w %[m], %[t1]\n\t" /* t1 = ba */
59 "mulu %[m], %[n]\n\t" /* b * d */
60 "swap.w %[n], %[t3]\n\t" /* t3 = dc */
61 "sts macl, %[r]\n\t" /* r = b * d */
62 "mulu %[m], %[t3]\n\t" /* b * c */
63 "shlr16 %[r]\n\t"
64 "sts macl, %[t2]\n\t" /* t2 = b * c */
65 "mulu %[t1], %[t3]\n\t" /* a * c */
66 "add %[t2], %[r]\n\t"
67 "sts macl, %[t3]\n\t" /* t3 = a * c */
68 "mulu %[t1], %[n]\n\t" /* a * d */
69 "shll16 %[t3]\n\t"
70 "sts macl, %[t2]\n\t" /* t2 = a * d */
71 "add %[t2], %[r]\n\t"
72 "add %[t3], %[r]\n\t" /* r = ((b * d) >> 16) + (b * c + a * d) +
73 ((a * c) << 16) */
74 "add %[h], %[r]\n\t" /* round result */
75 "shlr16 %[r]\n\t" /* truncate result */
76 : /* outputs */
77 [r] "=&r"(r),
78 [t1]"=&r"(t1),
79 [t2]"=&r"(t2),
80 [t3]"=&r"(t3)
81 : /* inputs */
82 [h] "r" (h),
83 [m] "r" (m),
84 [n] "r" (n)
85 );
86 return r;
87}
88#elif defined(TEST_SH_MATH)
89static inline uint32_t sc_mul_u32_rnd(uint32_t op1, uint32_t op2)
90{
91 uint64_t tmp = (uint64_t)op1 * op2;
92 tmp += 1LU << 31;
93 tmp >>= 32;
94 return tmp;
95}
96#else
97#define SC_OUT(n, c) (((n) + (1 << 23)) >> 24) 46#define SC_OUT(n, c) (((n) + (1 << 23)) >> 24)
98#endif
99#ifndef SC_OUT 47#ifndef SC_OUT
100#define SC_OUT(n, c) (sc_mul_u32_rnd(n, (c)->recip)) 48#define SC_OUT(n, c) (sc_mul_u32_rnd(n, (c)->recip))
101#endif 49#endif
@@ -125,14 +73,10 @@ struct uint32_argb {
125 horizontal scaler, and row output 73 horizontal scaler, and row output
126*/ 74*/
127struct scaler_context { 75struct scaler_context {
128#if defined(CPU_SH) || defined(TEST_SH_MATH)
129 uint32_t recip;
130#else
131 uint32_t h_i_val; 76 uint32_t h_i_val;
132 uint32_t h_o_val; 77 uint32_t h_o_val;
133 uint32_t v_i_val; 78 uint32_t v_i_val;
134 uint32_t v_o_val; 79 uint32_t v_o_val;
135#endif
136 struct bitmap *bm; 80 struct bitmap *bm;
137 struct dim *src; 81 struct dim *src;
138 unsigned char *buf; 82 unsigned char *buf;