Enable nocache sections using the linker. PP5022/4 must use SW_CORELOCK now with shared variables in DRAM (it seems swp(b) is at least partially broken on all PP or I'm doing something very wrong here :\). For core-shared data use SHAREDBSS/DATA_ATTR. NOCACHEBSS/DATA_ATTR is available whether or not single core is forced for static peripheral-DMA buffer allocation without use of the UNCACHED_ADDR macro in code and is likely useful on a non-PP target with a data cache (although not actually enabled in config.h and the .lds's in this commit).

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16981 a1c6a512-1295-4272-9138-f99709370657

1 files changed, 43 insertions, 4 deletions

diff --git a/apps/plugins/plugin.lds b/apps/plugins/plugin.lds
index 9659412730..8699ca1c25 100644
--- a/apps/plugins/plugin.lds
+++ b/apps/plugins/plugin.lds
@@ -16,6 +16,20 @@ OUTPUT_FORMAT(elf32-sh)
 #define STUBOFFSET 0
 #endif
 
+#if defined(CPU_PP)
+#ifdef CPU_PP502x
+#define NOCACHE_BASE    0x10000000
+#else
+#define NOCACHE_BASE    0x28000000
+#endif /* CPU_* */
+#define CACHEALIGN_SIZE 16
+#endif /* CPU_PP */
+
+#ifndef NOCACHE_BASE
+/* Default to no offset if target doesn't define this */
+#define NOCACHE_BASE 0x00000000
+#endif
+
 #if CONFIG_CPU==S3C2440
 #include "s3c2440.h"
 #define DRAMSIZE (MEMORYSIZE * 0x100000) - 0x100 - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE - LCD_BUFFER_SIZE - TTB_SIZE
@@ -119,10 +133,20 @@ SECTIONS
     .data :
     {
         *(.data*)
+    } > PLUGIN_RAM
+
+#if NOCACHE_BASE != 0
+    .ncdata . + NOCACHE_BASE :
+    {
+        . = ALIGN(CACHEALIGN_SIZE);
+        *(.ncdata*)
+        . = ALIGN(CACHEALIGN_SIZE);
+    } AT> PLUGIN_RAM
+#endif
+
 #if defined(IRAMSIZE)
-        iramcopy = .;
+    iramcopy = . - NOCACHE_BASE;
 #endif
-    } > PLUGIN_RAM
 
     /DISCARD/ :
     {
@@ -139,6 +163,7 @@ SECTIONS
         iramend = .;
     } > PLUGIN_IRAM
 
+
     .ibss (NOLOAD) :
     {
         iedata = .;
@@ -150,13 +175,27 @@ SECTIONS
 
     .bss (NOLOAD) :
     {
-    plugin_bss_start = .;
+        plugin_bss_start = .;
         *(.bss*)
         *(COMMON)
         . = ALIGN(0x4);
+    } > PLUGIN_RAM
+    
+#if NOCACHE_BASE != 0
+    .ncbss . + NOCACHE_BASE (NOLOAD) :
+    {
+        . = ALIGN(CACHEALIGN_SIZE);
+        *(.ncbss*)
+        . = ALIGN(CACHEALIGN_SIZE);
+    } AT> PLUGIN_RAM
+#endif
+
+    /* Restore . */
+    .pluginend . - NOCACHE_BASE :
+    {
         _plugin_end_addr = .;
         plugin_end_addr = .;
-    } > PLUGIN_RAM
+    }
 
     /* Special trick to avoid a linker error when no other sections are
        left after garbage collection (plugin not for this platform) */