summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJens Arnold <amiconn@rockbox.org>2008-04-03 21:48:41 +0000
committerJens Arnold <amiconn@rockbox.org>2008-04-03 21:48:41 +0000
commitfbfe6d66745426099fea9aaa7dac0ba3eba13e26 (patch)
treeae60ba2cb7cffb3c5d78ee73c0d8a984f150101d
parentfe9eb68ec0e3d5b8b883e8942e3c0f24e44d598f (diff)
downloadrockbox-fbfe6d66745426099fea9aaa7dac0ba3eba13e26.tar.gz
rockbox-fbfe6d66745426099fea9aaa7dac0ba3eba13e26.zip
Fix the PP5002 interrupt controller register definitions. The PP5002 interrupt controller matches the first half of the PP502x interrupt controller (the actual interrupt bits are different though).
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16956 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/export/pp5002.h14
1 files changed, 12 insertions, 2 deletions
diff --git a/firmware/export/pp5002.h b/firmware/export/pp5002.h
index 8882f296c3..bbd7003c63 100644
--- a/firmware/export/pp5002.h
+++ b/firmware/export/pp5002.h
@@ -93,12 +93,22 @@
93#define GPIOC_INT_CLR (*(volatile unsigned char *)(0xcf000078)) 93#define GPIOC_INT_CLR (*(volatile unsigned char *)(0xcf000078))
94#define GPIOD_INT_CLR (*(volatile unsigned char *)(0xcf00007c)) 94#define GPIOD_INT_CLR (*(volatile unsigned char *)(0xcf00007c))
95 95
96#define INT_FORCED_CLR (*(volatile unsigned long *)(0xcf00101c))
97#define CPU_INT_STAT (*(volatile unsigned long *)(0xcf001000)) 96#define CPU_INT_STAT (*(volatile unsigned long *)(0xcf001000))
97#define COP_INT_STAT (*(volatile unsigned long *)(0xcf001004))
98#define CPU_FIQ_STAT (*(volatile unsigned long *)(0xcf001008))
99#define COP_FIQ_STAT (*(volatile unsigned long *)(0xcf00100c))
100
101#define INT_STAT (*(volatile unsigned long *)(0xcf001010))
102#define INT_FORCED_STAT (*(volatile unsigned long *)(0xcf001014))
103#define INT_FORCED_SET (*(volatile unsigned long *)(0xcf001018))
104#define INT_FORCED_CLR (*(volatile unsigned long *)(0xcf00101c))
105
106#define CPU_INT_EN_STAT (*(volatile unsigned long *)(0xcf001020))
98#define CPU_INT_EN (*(volatile unsigned long *)(0xcf001024)) 107#define CPU_INT_EN (*(volatile unsigned long *)(0xcf001024))
99#define CPU_INT_CLR (*(volatile unsigned long *)(0xcf001028)) 108#define CPU_INT_CLR (*(volatile unsigned long *)(0xcf001028))
100#define CPU_INT_PRIORITY (*(volatile unsigned long *)(0xcf00102c)) 109#define CPU_INT_PRIORITY (*(volatile unsigned long *)(0xcf00102c))
101#define COP_INT_STAT (*(volatile unsigned long *)(0xcf001010)) 110
111#define COP_INT_EN_STAT (*(volatile unsigned long *)(0xcf001030))
102#define COP_INT_EN (*(volatile unsigned long *)(0xcf001034)) 112#define COP_INT_EN (*(volatile unsigned long *)(0xcf001034))
103#define COP_INT_CLR (*(volatile unsigned long *)(0xcf001038)) 113#define COP_INT_CLR (*(volatile unsigned long *)(0xcf001038))
104#define COP_INT_PRIORITY (*(volatile unsigned long *)(0xcf00103c)) 114#define COP_INT_PRIORITY (*(volatile unsigned long *)(0xcf00103c))