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author | Rafaël Carré <rafael.carre@gmail.com> | 2010-02-21 22:01:33 +0000 |
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committer | Rafaël Carré <rafael.carre@gmail.com> | 2010-02-21 22:01:33 +0000 |
commit | f857fe145090711ba4c7a28e82da6bde4f4bba9a (patch) | |
tree | c4863e381698d3baf5bbce53d58154eb8940b7a9 | |
parent | 95f063cc6f7201e6d806fa6b903c08b4132df2da (diff) | |
download | rockbox-f857fe145090711ba4c7a28e82da6bde4f4bba9a.tar.gz rockbox-f857fe145090711ba4c7a28e82da6bde4f4bba9a.zip |
sd-as3525v2: MCI_HCON bits
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24831 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/target/arm/as3525/sd-as3525v2.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/firmware/target/arm/as3525/sd-as3525v2.c b/firmware/target/arm/as3525/sd-as3525v2.c index c547befa35..96c615a2be 100644 --- a/firmware/target/arm/as3525/sd-as3525v2.c +++ b/firmware/target/arm/as3525/sd-as3525v2.c | |||
@@ -175,7 +175,10 @@ static void printf(const char *format, ...) | |||
175 | #define MCI_DEBNCE SD_REG(0x64) /* card detect debounce */ | 175 | #define MCI_DEBNCE SD_REG(0x64) /* card detect debounce */ |
176 | #define MCI_USRID SD_REG(0x68) /* user id */ | 176 | #define MCI_USRID SD_REG(0x68) /* user id */ |
177 | #define MCI_VERID SD_REG(0x6C) /* version id */ | 177 | #define MCI_VERID SD_REG(0x6C) /* version id */ |
178 | |||
178 | #define MCI_HCON SD_REG(0x70) /* hardware config */ | 179 | #define MCI_HCON SD_REG(0x70) /* hardware config */ |
180 | /* bit 0 : card type | ||
181 | * bits 5:1 : maximum card index */ | ||
179 | 182 | ||
180 | #define MCI_BMOD SD_REG(0x80) /* bus mode */ | 183 | #define MCI_BMOD SD_REG(0x80) /* bus mode */ |
181 | #define MCI_PLDMND SD_REG(0x84) /* poll demand */ | 184 | #define MCI_PLDMND SD_REG(0x84) /* poll demand */ |
@@ -478,11 +481,11 @@ static void sd_thread(void) | |||
478 | 481 | ||
479 | static void init_controller(void) | 482 | static void init_controller(void) |
480 | { | 483 | { |
481 | int tmp = MCI_HCON; | 484 | int idx = (MCI_HCON >> 1) & 31; |
482 | int shift = 1 + ((tmp << 26) >> 27); | 485 | int idx_bits = (1 << idx) -1; |
483 | 486 | ||
484 | MCI_PWREN &= ~((1 << shift) -1); | 487 | MCI_PWREN &= ~idx_bits; |
485 | MCI_PWREN = (1 << shift) -1; | 488 | MCI_PWREN = idx_bits; |
486 | 489 | ||
487 | mci_delay(); | 490 | mci_delay(); |
488 | 491 | ||
@@ -497,7 +500,7 @@ static void init_controller(void) | |||
497 | 500 | ||
498 | MCI_CTYPE = 0; | 501 | MCI_CTYPE = 0; |
499 | 502 | ||
500 | MCI_CLKENA = (1<<shift) - 1; | 503 | MCI_CLKENA = idx_bits; |
501 | 504 | ||
502 | MCI_ARGUMENT = 0; | 505 | MCI_ARGUMENT = 0; |
503 | MCI_COMMAND = CMD_DONE_BIT|CMD_SEND_CLK_ONLY|CMD_WAIT_PRV_DAT_BIT; | 506 | MCI_COMMAND = CMD_DONE_BIT|CMD_SEND_CLK_ONLY|CMD_WAIT_PRV_DAT_BIT; |