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| author | Michael Sparmann <theseven@rockbox.org> | 2009-11-25 19:15:19 +0000 |
|---|---|---|
| committer | Michael Sparmann <theseven@rockbox.org> | 2009-11-25 19:15:19 +0000 |
| commit | f788e8feffedc056ded4b2d8134e9805dc2caab2 (patch) | |
| tree | 203ca93a842614f83265661b81090f0a763ab208 | |
| parent | 84f04a57eee2480100ab533b97665fec7f1da83f (diff) | |
| download | rockbox-f788e8feffedc056ded4b2d8134e9805dc2caab2.tar.gz rockbox-f788e8feffedc056ded4b2d8134e9805dc2caab2.zip | |
Fix the S5L8701 µsec timer
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23747 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/export/s5l8700.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/firmware/export/s5l8700.h b/firmware/export/s5l8700.h index a8341137ee..94b0c4e703 100644 --- a/firmware/export/s5l8700.h +++ b/firmware/export/s5l8700.h | |||
| @@ -310,9 +310,9 @@ | |||
| 310 | #define TDDATA1 (*(REG32_PTR_T)(0x3C70006C)) /* Data1 Register */ | 310 | #define TDDATA1 (*(REG32_PTR_T)(0x3C70006C)) /* Data1 Register */ |
| 311 | #define TDPRE (*(REG32_PTR_T)(0x3C700070)) /* Pre-scale register */ | 311 | #define TDPRE (*(REG32_PTR_T)(0x3C700070)) /* Pre-scale register */ |
| 312 | #define TDCNT (*(REG32_PTR_T)(0x3C700074)) /* Counter register */ | 312 | #define TDCNT (*(REG32_PTR_T)(0x3C700074)) /* Counter register */ |
| 313 | #define FIVE_USEC_TIMER (((*(REG32_PTR_T)(0x3C700080)) << 32) \ | 313 | #define FIVE_USEC_TIMER (((uint64_t)(*(REG32_PTR_T)(0x3C700080)) << 32) \ |
| 314 | | (*(REG32_PTR_T)(0x3C700084))) /* 64bit 5usec timer */ | 314 | | (*(REG32_PTR_T)(0x3C700084))) /* 64bit 5usec timer */ |
| 315 | #define USEC_TIMER ((*(REG32_PTR_T)(0x3C700084)) * 5) /* lower 32 bits of the above as a usec timer */ | 315 | #define USEC_TIMER FIVE_USEC_TIMER * 5 /* usecs */ |
| 316 | 316 | ||
| 317 | /* 12. NAND FLASH CONTROLER */ | 317 | /* 12. NAND FLASH CONTROLER */ |
| 318 | #if CONFIG_CPU==S5L8701 | 318 | #if CONFIG_CPU==S5L8701 |