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authorKarl Kurbjun <kkurbjun@gmail.com>2009-08-01 15:41:40 +0000
committerKarl Kurbjun <kkurbjun@gmail.com>2009-08-01 15:41:40 +0000
commitf3298a46126be6ee649da68d2d952daeb79e2a53 (patch)
tree3de9b7bdec6d5c677898bb1c3600c49cd24d2475
parent5c882be6081391599158afb03be11ec18b2fc112 (diff)
downloadrockbox-f3298a46126be6ee649da68d2d952daeb79e2a53.tar.gz
rockbox-f3298a46126be6ee649da68d2d952daeb79e2a53.zip
M:Robe 500/M66591: Add support for full-speed USB transfers, and fix the UART interrupt clearing.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22095 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/drivers/m66591.c60
-rw-r--r--firmware/target/arm/tms320dm320/uart-dm320.c3
2 files changed, 43 insertions, 20 deletions
diff --git a/firmware/drivers/m66591.c b/firmware/drivers/m66591.c
index b70ff2ba7d..06d42b55c2 100644
--- a/firmware/drivers/m66591.c
+++ b/firmware/drivers/m66591.c
@@ -41,6 +41,11 @@
41/******************************************************************************* 41/*******************************************************************************
42 * These are the driver specific defines. 42 * These are the driver specific defines.
43 ******************************************************************************/ 43 ******************************************************************************/
44
45/* This define is primarily intended for testing, using HISPEED all the time
46 * should be acceptable since the defice should down-train if the host does not
47 * support HISPEED.
48 */
44#define HISPEED 49#define HISPEED
45 50
46/* Right now sending blocks till the full transfer has completed, this needs to 51/* Right now sending blocks till the full transfer has completed, this needs to
@@ -134,24 +139,43 @@ static int pipe_buffer_size (int pipe) {
134} 139}
135#endif 140#endif
136 141
137/* This function returns the maximum packet size for each endpoint/pipe. It is 142/* This function returns the maximum packet size for each endpoint/pipe. The
138 * Currently only setup to support Highspeed mode. 143 * max packet size is dependent on whether the device is running High or Full
144 * speed.
139 */ 145 */
140static int pipe_maxpack_size (int pipe) { 146static int pipe_maxpack_size (int pipe) {
141 switch(pipe) { 147 if( (M66591_HSFS & 0xFF) == 0x03 ) { /* Device is running Highspeed */
142 case 0: 148 switch(pipe) {
143 /* DCP max packet size is configurable */ 149 case 0:
144 return M66591_DCP_MXPKSZ; 150 /* DCP max packet size is configurable */
145 case 1: 151 return M66591_DCP_MXPKSZ;
146 case 2: 152 case 1:
147 case 3: 153 case 2:
148 case 4: 154 case 3:
149 return 512; 155 case 4:
150 case 5: 156 return 512;
151 case 6: 157 case 5:
152 return 64; 158 case 6:
153 default: 159 return 64;
154 return 0; 160 default:
161 return 0;
162 }
163 } else { /* Device is running Full speed */
164 switch(pipe) {
165 case 0:
166 /* DCP max packet size is configurable */
167 return M66591_DCP_MXPKSZ;
168 case 1:
169 case 2:
170 case 3:
171 case 4:
172 return 64;
173 case 5:
174 case 6:
175 return 64;
176 default:
177 return 0;
178 }
155 } 179 }
156} 180}
157 181
@@ -461,7 +485,7 @@ void USB_DEVICE(void) {
461 case CTRL_RTDS: 485 case CTRL_RTDS:
462 case CTRL_WTDS: 486 case CTRL_WTDS:
463 case CTRL_WTND: 487 case CTRL_WTND:
464 // If data is not valid stop 488 /* If data is not valid stop */
465 if(!(M66591_INTSTAT_MAIN & (1<<3)) ) { 489 if(!(M66591_INTSTAT_MAIN & (1<<3)) ) {
466 logf("mxx: CTRT interrupt but VALID is false"); 490 logf("mxx: CTRT interrupt but VALID is false");
467 break; 491 break;
@@ -471,7 +495,7 @@ void USB_DEVICE(void) {
471 case CTRL_RTSS: 495 case CTRL_RTSS:
472 case CTRL_WTSS: 496 case CTRL_WTSS:
473 pipe_handshake(0, PIPE_SHAKE_BUF); 497 pipe_handshake(0, PIPE_SHAKE_BUF);
474 M66591_DCPCTRL |= 1<<2; // Set CCPL 498 M66591_DCPCTRL |= 1<<2; /* Set CCPL */
475 break; 499 break;
476 default: 500 default:
477 logf("mxx: CTRT with unknown CTSQ"); 501 logf("mxx: CTRT with unknown CTSQ");
diff --git a/firmware/target/arm/tms320dm320/uart-dm320.c b/firmware/target/arm/tms320dm320/uart-dm320.c
index d68beb6e01..414072c929 100644
--- a/firmware/target/arm/tms320dm320/uart-dm320.c
+++ b/firmware/target/arm/tms320dm320/uart-dm320.c
@@ -156,6 +156,7 @@ int uart1_gets_queue(char *str, int size)
156/* UART1 receive/transmit interupt handler */ 156/* UART1 receive/transmit interupt handler */
157void UART1(void) 157void UART1(void)
158{ 158{
159 IO_INTC_IRQ0 = INTR_IRQ0_UART1; /* Clear the interrupt first */
159 while (IO_UART1_RFCR & 0x3f) 160 while (IO_UART1_RFCR & 0x3f)
160 { 161 {
161 if (uart1_receive_count > RECEIVE_RING_SIZE) 162 if (uart1_receive_count > RECEIVE_RING_SIZE)
@@ -176,6 +177,4 @@ void UART1(void)
176 IO_UART1_DTRR=uart1_send_buffer_ring[uart1_send_read++]; 177 IO_UART1_DTRR=uart1_send_buffer_ring[uart1_send_read++];
177 uart1_send_count--; 178 uart1_send_count--;
178 } 179 }
179
180 IO_INTC_IRQ0 = INTR_IRQ0_UART1;
181} 180}