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authorAndree Buschmann <AndreeBuschmann@t-online.de>2011-06-20 18:37:51 +0000
committerAndree Buschmann <AndreeBuschmann@t-online.de>2011-06-20 18:37:51 +0000
commitf0c032a5234f38073d745206776e8ab03f55f12c (patch)
treea384bcdb62fc3e7e79138d42cac068c274815d1f
parentf2ef42c1da977402e19e6ac77165f9cd0fd25643 (diff)
downloadrockbox-f0c032a5234f38073d745206776e8ab03f55f12c.tar.gz
rockbox-f0c032a5234f38073d745206776e8ab03f55f12c.zip
Submit first part of FS#12154. Whitespace removal and correction of several defines in WM8758 driver according to data sheet, no functional change. Thanks to Seheon Ryu.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30024 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--docs/CREDITS1
-rw-r--r--firmware/drivers/audio/wm8758.c41
-rw-r--r--firmware/export/wm8758.h181
3 files changed, 120 insertions, 103 deletions
diff --git a/docs/CREDITS b/docs/CREDITS
index b513a05f2a..94cc3c0d65 100644
--- a/docs/CREDITS
+++ b/docs/CREDITS
@@ -596,6 +596,7 @@ Ophir Lojkine
596Stephan Grossklass 596Stephan Grossklass
597John Morris 597John Morris
598Sean Bartell 598Sean Bartell
599Seheon Ryu
599 600
600The libmad team 601The libmad team
601The wavpack team 602The wavpack team
diff --git a/firmware/drivers/audio/wm8758.c b/firmware/drivers/audio/wm8758.c
index 5abc8c9fcd..3cae79f026 100644
--- a/firmware/drivers/audio/wm8758.c
+++ b/firmware/drivers/audio/wm8758.c
@@ -130,18 +130,18 @@ void audiohw_preinit(void)
130 wmcodec_write(RESET, RESET_RESET); 130 wmcodec_write(RESET, RESET_RESET);
131 131
132 wmcodec_write(PWRMGMT1, PWRMGMT1_PLLEN | PWRMGMT1_BIASEN 132 wmcodec_write(PWRMGMT1, PWRMGMT1_PLLEN | PWRMGMT1_BIASEN
133 | PWRMGMT1_VMIDSEL_5K); 133 | PWRMGMT1_VMIDSEL_10K);
134 wmcodec_write(PWRMGMT2, PWRMGMT2_ROUT1EN | PWRMGMT2_LOUT1EN); 134 wmcodec_write(PWRMGMT2, PWRMGMT2_ROUT1EN | PWRMGMT2_LOUT1EN);
135 wmcodec_write(PWRMGMT3, PWRMGMT3_LOUT2EN | PWRMGMT3_ROUT2EN 135 wmcodec_write(PWRMGMT3, PWRMGMT3_LOUT2EN | PWRMGMT3_ROUT2EN
136 | PWRMGMT3_RMIXEN | PWRMGMT3_LMIXEN 136 | PWRMGMT3_RMIXEN | PWRMGMT3_LMIXEN
137 | PWRMGMT3_DACENR | PWRMGMT3_DACENL); 137 | PWRMGMT3_DACENR | PWRMGMT3_DACENL);
138 138
139 wmcodec_write(AINTFCE, AINTFCE_IWL_16BIT | AINTFCE_FORMAT_I2S); 139 wmcodec_write(AINTFCE, AINTFCE_IWL_16BIT | AINTFCE_FORMAT_I2S);
140 wmcodec_write(OUTCTRL, OUTCTRL_VROI); 140 wmcodec_write(OUTCTRL, OUTCTRL_VROI);
141 wmcodec_write(CLKCTRL, CLKCTRL_MS); /* WM8758 is clock master */ 141 wmcodec_write(CLKCTRL, CLKCTRL_MS); /* WM8758 is clock master */
142 142
143 audiohw_set_frequency(HW_FREQ_44); 143 audiohw_set_frequency(HW_FREQ_44);
144 144
145 wmcodec_write(LOUTMIX, LOUTMIX_DACL2LMIX); 145 wmcodec_write(LOUTMIX, LOUTMIX_DACL2LMIX);
146 wmcodec_write(ROUTMIX, ROUTMIX_DACR2RMIX); 146 wmcodec_write(ROUTMIX, ROUTMIX_DACR2RMIX);
147} 147}
@@ -149,7 +149,7 @@ void audiohw_preinit(void)
149void audiohw_postinit(void) 149void audiohw_postinit(void)
150{ 150{
151 wmcodec_write(PWRMGMT1, PWRMGMT1_PLLEN | PWRMGMT1_BIASEN 151 wmcodec_write(PWRMGMT1, PWRMGMT1_PLLEN | PWRMGMT1_BIASEN
152 | PWRMGMT1_VMIDSEL_75K); 152 | PWRMGMT1_VMIDSEL_100K);
153 /* lower the VMID power consumption */ 153 /* lower the VMID power consumption */
154 audiohw_mute(false); 154 audiohw_mute(false);
155} 155}
@@ -159,12 +159,12 @@ void audiohw_set_master_vol(int vol_l, int vol_r)
159 int dac_l, amp_l, dac_r, amp_r; 159 int dac_l, amp_l, dac_r, amp_r;
160 get_volume_params(vol_l, &dac_l, &amp_l); 160 get_volume_params(vol_l, &dac_l, &amp_l);
161 get_volume_params(vol_r, &dac_r, &amp_r); 161 get_volume_params(vol_r, &dac_r, &amp_r);
162 162
163 /* set DAC 163 /* set DAC
164 Important: DAC is global and will also affect lineout */ 164 Important: DAC is global and will also affect lineout */
165 wmcodec_write(LDACVOL, dac_l); 165 wmcodec_write(LDACVOL, dac_l);
166 wmcodec_write(RDACVOL, dac_r | RDACVOL_DACVU); 166 wmcodec_write(RDACVOL, dac_r | RDACVOL_DACVU);
167 167
168 /* set headphone amp OUT1 */ 168 /* set headphone amp OUT1 */
169 wmcodec_write(LOUT1VOL, amp_l | LOUT1VOL_LOUT1ZC); 169 wmcodec_write(LOUT1VOL, amp_l | LOUT1VOL_LOUT1ZC);
170 wmcodec_write(ROUT1VOL, amp_r | ROUT1VOL_ROUT1ZC | ROUT1VOL_OUT1VU); 170 wmcodec_write(ROUT1VOL, amp_r | ROUT1VOL_ROUT1ZC | ROUT1VOL_OUT1VU);
@@ -175,7 +175,7 @@ void audiohw_set_lineout_vol(int vol_l, int vol_r)
175 int dac_l, amp_l, dac_r, amp_r; 175 int dac_l, amp_l, dac_r, amp_r;
176 get_volume_params(vol_l, &dac_l, &amp_l); 176 get_volume_params(vol_l, &dac_l, &amp_l);
177 get_volume_params(vol_r, &dac_r, &amp_r); 177 get_volume_params(vol_r, &dac_r, &amp_r);
178 178
179 /* set lineout amp OUT2 */ 179 /* set lineout amp OUT2 */
180 wmcodec_write(LOUT2VOL, amp_l | LOUT2VOL_LOUT2ZC); 180 wmcodec_write(LOUT2VOL, amp_l | LOUT2VOL_LOUT2ZC);
181 wmcodec_write(ROUT2VOL, amp_r | ROUT2VOL_ROUT2ZC | ROUT2VOL_OUT2VU); 181 wmcodec_write(ROUT2VOL, amp_r | ROUT2VOL_ROUT2ZC | ROUT2VOL_OUT2VU);
@@ -186,7 +186,7 @@ void audiohw_enable_lineout(bool enable)
186 /* Initialize data without lineout enabling. */ 186 /* Initialize data without lineout enabling. */
187 int pwrmgmt3_data = PWRMGMT3_RMIXEN | PWRMGMT3_LMIXEN 187 int pwrmgmt3_data = PWRMGMT3_RMIXEN | PWRMGMT3_LMIXEN
188 | PWRMGMT3_DACENR | PWRMGMT3_DACENL; 188 | PWRMGMT3_DACENR | PWRMGMT3_DACENL;
189 /* Set lineout (OUT2), if enabled. */ 189 /* Set lineout (OUT2), if enabled. */
190 if (enable) 190 if (enable)
191 pwrmgmt3_data |= PWRMGMT3_LOUT2EN | PWRMGMT3_ROUT2EN; 191 pwrmgmt3_data |= PWRMGMT3_LOUT2EN | PWRMGMT3_ROUT2EN;
192 192
@@ -209,13 +209,13 @@ void audiohw_set_bass_cutoff(int value)
209void audiohw_set_treble(int value) 209void audiohw_set_treble(int value)
210{ 210{
211 eq5_reg = (eq5_reg & ~EQ_GAIN_MASK) | EQ_GAIN_VALUE(value); 211 eq5_reg = (eq5_reg & ~EQ_GAIN_MASK) | EQ_GAIN_VALUE(value);
212 wmcodec_write(EQ5, eq5_reg); 212 wmcodec_write(EQ5, eq5_reg);
213} 213}
214 214
215void audiohw_set_treble_cutoff(int value) 215void audiohw_set_treble_cutoff(int value)
216{ 216{
217 eq5_reg = (eq5_reg & ~EQ_CUTOFF_MASK) | EQ_CUTOFF_VALUE(value); 217 eq5_reg = (eq5_reg & ~EQ_CUTOFF_MASK) | EQ_CUTOFF_VALUE(value);
218 wmcodec_write(EQ5, eq5_reg); 218 wmcodec_write(EQ5, eq5_reg);
219} 219}
220 220
221/* Nice shutdown of WM8758 codec */ 221/* Nice shutdown of WM8758 codec */
@@ -232,10 +232,10 @@ void audiohw_close(void)
232void audiohw_set_frequency(int fsel) 232void audiohw_set_frequency(int fsel)
233{ 233{
234 /* CLKCTRL_MCLKDIV_MASK and ADDCTRL_SR_MASK don't overlap, 234 /* CLKCTRL_MCLKDIV_MASK and ADDCTRL_SR_MASK don't overlap,
235 so they can both fit in one byte. Bit 0 selects PLL 235 so they can both fit in one byte. Bit 0 selects PLL
236 configuration via pll_setups. 236 configuration via pll_setups.
237 */ 237 */
238 static const unsigned char freq_setups[HW_NUM_FREQ] = 238 static const unsigned char freq_setups[HW_NUM_FREQ] =
239 { 239 {
240 [HW_FREQ_48] = CLKCTRL_MCLKDIV_2 | ADDCTRL_SR_48kHz | 1, 240 [HW_FREQ_48] = CLKCTRL_MCLKDIV_2 | ADDCTRL_SR_48kHz | 1,
241 [HW_FREQ_44] = CLKCTRL_MCLKDIV_2 | ADDCTRL_SR_48kHz, 241 [HW_FREQ_44] = CLKCTRL_MCLKDIV_2 | ADDCTRL_SR_48kHz,
@@ -248,11 +248,11 @@ void audiohw_set_frequency(int fsel)
248 [HW_FREQ_8] = CLKCTRL_MCLKDIV_12 | ADDCTRL_SR_8kHz | 1 248 [HW_FREQ_8] = CLKCTRL_MCLKDIV_12 | ADDCTRL_SR_8kHz | 1
249 }; 249 };
250 250
251 /* Each PLL configuration is an array consisting of 251 /* Each PLL configuration is an array consisting of
252 { PLLN, PLLK1, PLLK2, PLLK3 }. The WM8983 datasheet requires 252 { PLLN, PLLK1, PLLK2, PLLK3 }. The WM8983 datasheet requires
253 5 < PLLN < 13, and states optimum is PLLN = 8, f2 = 90 MHz 253 5 < PLLN < 13, and states optimum is PLLN = 8, f2 = 90 MHz
254 */ 254 */
255 static const unsigned short pll_setups[2][4] = 255 static const unsigned short pll_setups[2][4] =
256 { 256 {
257 /* f1 = 12 MHz, R = 7.5264, f2 = 90.3168 MHz, fPLLOUT = 22.5792 MHz */ 257 /* f1 = 12 MHz, R = 7.5264, f2 = 90.3168 MHz, fPLLOUT = 22.5792 MHz */
258 { PLLN_PLLPRESCALE | 0x7, 0x21, 0x161, 0x26 }, 258 { PLLN_PLLPRESCALE | 0x7, 0x21, 0x161, 0x26 },
@@ -267,12 +267,12 @@ void audiohw_set_frequency(int fsel)
267 wmcodec_write(PLLN + i, pll_setups[freq_setups[fsel] & 1][i]); 267 wmcodec_write(PLLN + i, pll_setups[freq_setups[fsel] & 1][i]);
268 268
269 /* CLKCTRL_MCLKDIV divides fPLLOUT to get SYSCLK (256 * sample rate) */ 269 /* CLKCTRL_MCLKDIV divides fPLLOUT to get SYSCLK (256 * sample rate) */
270 wmcodec_write(CLKCTRL, CLKCTRL_CLKSEL 270 wmcodec_write(CLKCTRL, CLKCTRL_CLKSEL
271 | (freq_setups[fsel] & CLKCTRL_MCLKDIV_MASK) 271 | (freq_setups[fsel] & CLKCTRL_MCLKDIV_MASK)
272 | CLKCTRL_BCLKDIV_2 | CLKCTRL_MS); 272 | CLKCTRL_BCLKDIV_2 | CLKCTRL_MS);
273 273
274 /* set ADC and DAC filter characteristics according to sample rate */ 274 /* set ADC and DAC filter characteristics according to sample rate */
275 wmcodec_write(ADDCTRL, (freq_setups[fsel] & ADDCTRL_SR_MASK) 275 wmcodec_write(ADDCTRL, (freq_setups[fsel] & ADDCTRL_SR_MASK)
276 | ADDCTRL_SLOWCLKEN); 276 | ADDCTRL_SLOWCLKEN);
277 /* SLOWCLK enabled for zero cross timeout to work */ 277 /* SLOWCLK enabled for zero cross timeout to work */
278} 278}
@@ -280,7 +280,7 @@ void audiohw_set_frequency(int fsel)
280void audiohw_enable_recording(bool source_mic) 280void audiohw_enable_recording(bool source_mic)
281{ 281{
282 (void)source_mic; /* We only have a line-in (I think) */ 282 (void)source_mic; /* We only have a line-in (I think) */
283 283
284 wmcodec_write(PWRMGMT2, PWRMGMT2_ROUT1EN | PWRMGMT2_LOUT1EN 284 wmcodec_write(PWRMGMT2, PWRMGMT2_ROUT1EN | PWRMGMT2_LOUT1EN
285 | PWRMGMT2_INPGAENR | PWRMGMT2_INPGAENL 285 | PWRMGMT2_INPGAENR | PWRMGMT2_INPGAENL
286 | PWRMGMT2_ADCENR | PWRMGMT2_ADCENL); 286 | PWRMGMT2_ADCENR | PWRMGMT2_ADCENL);
@@ -297,7 +297,7 @@ void audiohw_enable_recording(bool source_mic)
297 | ROUTMIX_BYPR2RMIX | ROUTMIX_DACR2RMIX); 297 | ROUTMIX_BYPR2RMIX | ROUTMIX_DACR2RMIX);
298} 298}
299 299
300void audiohw_disable_recording(void) 300void audiohw_disable_recording(void)
301{ 301{
302 wmcodec_write(LOUTMIX, LOUTMIX_DACL2LMIX); 302 wmcodec_write(LOUTMIX, LOUTMIX_DACL2LMIX);
303 wmcodec_write(ROUTMIX, ROUTMIX_DACR2RMIX); 303 wmcodec_write(ROUTMIX, ROUTMIX_DACR2RMIX);
@@ -323,8 +323,7 @@ void audiohw_set_recvol(int left, int right, int type)
323 } 323 }
324} 324}
325 325
326void audiohw_set_monitor(bool enable) 326void audiohw_set_monitor(bool enable)
327{ 327{
328 (void)enable; 328 (void)enable;
329} 329}
330
diff --git a/firmware/export/wm8758.h b/firmware/export/wm8758.h
index 50cbc74e9a..ef5567e898 100644
--- a/firmware/export/wm8758.h
+++ b/firmware/export/wm8758.h
@@ -39,20 +39,19 @@ extern void audiohw_enable_lineout(bool enable);
39#define RESET 0x00 39#define RESET 0x00
40#define RESET_RESET 0x0 40#define RESET_RESET 0x0
41 41
42#define PWRMGMT1 0x01 42#define PWRMGMT1 0x01 /* default 000 */
43#define PWRMGMT1_VMIDSEL_OFF (0 << 0) 43#define PWRMGMT1_VMIDSEL_OFF (0 << 0)
44#define PWRMGMT1_VMIDSEL_75K (1 << 0) 44#define PWRMGMT1_VMIDSEL_100K (1 << 0)
45#define PWRMGMT1_VMIDSEL_300K (2 << 0) 45#define PWRMGMT1_VMIDSEL_500K (2 << 0)
46#define PWRMGMT1_VMIDSEL_5K (3 << 0) 46#define PWRMGMT1_VMIDSEL_10K (3 << 0)
47#define PWRMGMT1_BUFIOEN (1 << 2) 47#define PWRMGMT1_BUFIOEN (1 << 2)
48#define PWRMGMT1_BIASEN (1 << 3) 48#define PWRMGMT1_BIASEN (1 << 3)
49#define PWRMGMT1_MICBEN (1 << 4) 49#define PWRMGMT1_MICBEN (1 << 4)
50#define PWRMGMT1_PLLEN (1 << 5) 50#define PWRMGMT1_PLLEN (1 << 5)
51#define PWRMGMT1_OUT3MIXEN (1 << 6) 51#define PWRMGMT1_OUT3MIXEN (1 << 6)
52#define PWRMGMT1_OUT4MIXEN (1 << 7) 52#define PWRMGMT1_OUT4MIXEN (1 << 7)
53#define PWRMGMT1_BUFDCOPEN (1 << 8)
54 53
55#define PWRMGMT2 0x02 54#define PWRMGMT2 0x02 /* default 000 */
56#define PWRMGMT2_ADCENL (1 << 0) 55#define PWRMGMT2_ADCENL (1 << 0)
57#define PWRMGMT2_ADCENR (1 << 1) 56#define PWRMGMT2_ADCENR (1 << 1)
58#define PWRMGMT2_INPGAENL (1 << 2) 57#define PWRMGMT2_INPGAENL (1 << 2)
@@ -63,7 +62,7 @@ extern void audiohw_enable_lineout(bool enable);
63#define PWRMGMT2_LOUT1EN (1 << 7) 62#define PWRMGMT2_LOUT1EN (1 << 7)
64#define PWRMGMT2_ROUT1EN (1 << 8) 63#define PWRMGMT2_ROUT1EN (1 << 8)
65 64
66#define PWRMGMT3 0x03 65#define PWRMGMT3 0x03 /* default 000 */
67#define PWRMGMT3_DACENL (1 << 0) 66#define PWRMGMT3_DACENL (1 << 0)
68#define PWRMGMT3_DACENR (1 << 1) 67#define PWRMGMT3_DACENR (1 << 1)
69#define PWRMGMT3_LMIXEN (1 << 2) 68#define PWRMGMT3_LMIXEN (1 << 2)
@@ -73,26 +72,26 @@ extern void audiohw_enable_lineout(bool enable);
73#define PWRMGMT3_OUT3EN (1 << 7) 72#define PWRMGMT3_OUT3EN (1 << 7)
74#define PWRMGMT3_OUT4EN (1 << 8) 73#define PWRMGMT3_OUT4EN (1 << 8)
75 74
76#define AINTFCE 0x04 75#define AINTFCE 0x04 /* default 050 */
77#define AINTFCE_MONO (1 << 0) 76#define AINTFCE_MONO (1 << 0)
78#define AINTFCE_ALRSWAP (1 << 1) 77#define AINTFCE_ALRSWAP (1 << 1)
79#define AINTFCE_DLRSWAP (1 << 2) 78#define AINTFCE_DLRSWAP (1 << 2)
80#define AINTFCE_FORMAT_MSB_RJUST (0 << 3) 79#define AINTFCE_FORMAT_MSB_RJUST (0 << 3)
81#define AINTFCE_FORMAT_MSB_LJUST (1 << 3) 80#define AINTFCE_FORMAT_MSB_LJUST (1 << 3)
82#define AINTFCE_FORMAT_I2S (2 << 3) 81#define AINTFCE_FORMAT_I2S (2 << 3) /* default */
83#define AINTFCE_FORMAT_DSP (3 << 3) 82#define AINTFCE_FORMAT_DSP (3 << 3)
84#define AINTFCE_FORMAT_MASK (3 << 3) 83#define AINTFCE_FORMAT_MASK (3 << 3)
85#define AINTFCE_IWL_16BIT (0 << 5) 84#define AINTFCE_IWL_16BIT (0 << 5)
86#define AINTFCE_IWL_20BIT (1 << 5) 85#define AINTFCE_IWL_20BIT (1 << 5)
87#define AINTFCE_IWL_24BIT (2 << 5) 86#define AINTFCE_IWL_24BIT (2 << 5) /* default */
88#define AINTFCE_IWL_32BIT (3 << 5) 87#define AINTFCE_IWL_32BIT (3 << 5)
89#define AINTFCE_IWL_MASK (3 << 5) 88#define AINTFCE_IWL_MASK (3 << 5)
90#define AINTFCE_LRP (1 << 7) 89#define AINTFCE_LRP (1 << 7)
91#define AINTFCE_BCP (1 << 8) 90#define AINTFCE_BCP (1 << 8)
92 91
93#define COMPCTRL 0x05 /* unused */ 92#define COMPCTRL 0x05 /* default 000 unused */
94 93
95#define CLKCTRL 0x06 94#define CLKCTRL 0x06 /* default 140 */
96#define CLKCTRL_MS (1 << 0) 95#define CLKCTRL_MS (1 << 0)
97#define CLKCTRL_BCLKDIV_1 (0 << 2) 96#define CLKCTRL_BCLKDIV_1 (0 << 2)
98#define CLKCTRL_BCLKDIV_2 (1 << 2) 97#define CLKCTRL_BCLKDIV_2 (1 << 2)
@@ -102,16 +101,16 @@ extern void audiohw_enable_lineout(bool enable);
102#define CLKCTRL_BCLKDIV_32 (5 << 2) 101#define CLKCTRL_BCLKDIV_32 (5 << 2)
103#define CLKCTRL_MCLKDIV_1 (0 << 5) 102#define CLKCTRL_MCLKDIV_1 (0 << 5)
104#define CLKCTRL_MCLKDIV_1_5 (1 << 5) 103#define CLKCTRL_MCLKDIV_1_5 (1 << 5)
105#define CLKCTRL_MCLKDIV_2 (2 << 5) 104#define CLKCTRL_MCLKDIV_2 (2 << 5) /* default */
106#define CLKCTRL_MCLKDIV_3 (3 << 5) 105#define CLKCTRL_MCLKDIV_3 (3 << 5)
107#define CLKCTRL_MCLKDIV_4 (4 << 5) 106#define CLKCTRL_MCLKDIV_4 (4 << 5)
108#define CLKCTRL_MCLKDIV_6 (5 << 5) 107#define CLKCTRL_MCLKDIV_6 (5 << 5)
109#define CLKCTRL_MCLKDIV_8 (6 << 5) 108#define CLKCTRL_MCLKDIV_8 (6 << 5)
110#define CLKCTRL_MCLKDIV_12 (7 << 5) 109#define CLKCTRL_MCLKDIV_12 (7 << 5)
111#define CLKCTRL_MCLKDIV_MASK (7 << 5) 110#define CLKCTRL_MCLKDIV_MASK (7 << 5)
112#define CLKCTRL_CLKSEL (1 << 8) 111#define CLKCTRL_CLKSEL (1 << 8) /* default */
113 112
114#define ADDCTRL 0x07 113#define ADDCTRL 0x07 /* default 000 */
115#define ADDCTRL_SLOWCLKEN (1 << 0) 114#define ADDCTRL_SLOWCLKEN (1 << 0)
116#define ADDCTRL_SR_48kHz (0 << 1) 115#define ADDCTRL_SR_48kHz (0 << 1)
117#define ADDCTRL_SR_32kHz (1 << 1) 116#define ADDCTRL_SR_32kHz (1 << 1)
@@ -120,176 +119,194 @@ extern void audiohw_enable_lineout(bool enable);
120#define ADDCTRL_SR_12kHz (4 << 1) 119#define ADDCTRL_SR_12kHz (4 << 1)
121#define ADDCTRL_SR_8kHz (5 << 1) 120#define ADDCTRL_SR_8kHz (5 << 1)
122#define ADDCTRL_SR_MASK (7 << 1) 121#define ADDCTRL_SR_MASK (7 << 1)
122#define ADDCTRL_M128ENB (1 << 8)
123 123
124/* unused */ 124#define GPIOCTRL 0x08 /* default 000 unused */
125#define GPIOCTRL 0x08 125#define JACKDETECTCTRL1 0x09 /* default 000 unused */
126#define JACKDETECTCTRL1 0x09
127 126
128#define DACCTRL 0x0a 127#define DACCTRL 0x0a /* default 000 */
129#define DACCTRL_DACLPOL (1 << 0) 128#define DACCTRL_DACLPOL (1 << 0)
130#define DACCTRL_DACRPOL (1 << 1) 129#define DACCTRL_DACRPOL (1 << 1)
131#define DACCTRL_AMUTE (1 << 2) 130#define DACCTRL_AMUTE (1 << 2)
132#define DACCTRL_DACOSR128 (1 << 3) 131#define DACCTRL_DACOSR128 (1 << 3)
133#define DACCTRL_SOFTMUTE (1 << 6) 132#define DACCTRL_SOFTMUTE (1 << 6)
134 133
135#define LDACVOL 0x0b 134#define LDACVOL 0x0b /* default 0ff */
136#define LDACVOL_MASK 0xff 135#define LDACVOL_MASK 0xff
137#define LDACVOL_DACVU (1 << 8) 136#define LDACVOL_DACVU (1 << 8)
138 137
139#define RDACVOL 0x0c 138#define RDACVOL 0x0c /* default 0ff */
140#define RDACVOL_MASK 0xff 139#define RDACVOL_MASK 0xff
141#define RDACVOL_DACVU (1 << 8) 140#define RDACVOL_DACVU (1 << 8)
142 141
143#define JACKDETECTCTRL2 0x0d /* unused */ 142#define JACKDETECTCTRL2 0x0d /* default 000 unused */
144 143
145#define ADCCTRL 0x0e 144#define ADCCTRL 0x0e /* default 100 */
146#define ADCCTRL_ADCLPOL (1 << 0) 145#define ADCCTRL_ADCLPOL (1 << 0)
147#define ADCCTRL_ADCRPOL (1 << 1) 146#define ADCCTRL_ADCRPOL (1 << 1)
148#define ADCCTRL_ADCOSR128 (1 << 3) 147#define ADCCTRL_ADCOSR128 (1 << 3)
149#define ADCCTRL_HPFCUT_MASK (7 << 4) 148#define ADCCTRL_HPFCUT_MASK (7 << 4)
150#define ADCCTRL_HPFAPP (1 << 7) 149#define ADCCTRL_HPFAPP (1 << 7)
151#define ADCCTRL_HPFEN (1 << 8) 150#define ADCCTRL_HPFEN (1 << 8) /* default */
152 151
153#define LADCVOL 0x0f 152#define LADCVOL 0x0f /* default 0ff */
154#define LADCVOL_MASK 0xff 153#define LADCVOL_MASK 0xff
155#define LADCVOL_ADCVU (1 << 8) 154#define LADCVOL_ADCVU (1 << 8)
156 155
157#define RADCVOL 0x10 156#define RADCVOL 0x10 /* default 0ff */
158#define RADCVOL_MASK 0xff 157#define RADCVOL_MASK 0xff
159#define RADCVOL_ADCVU (1 << 8) 158#define RADCVOL_ADCVU (1 << 8)
160 159
161#define EQ1 0x12 160#define EQ1 0x12 /* default 12c */
162#define EQ5 0x16 161#define EQ2 0x13 /* default 02c */
163/* note: the WM8983 used for reference has a true 5 band EQ, but the WM8758 162#define EQ3 0x14 /* default 02c */
164 * does only have low shelf & high shelf (tested). Not sure about 3D mode. */ 163#define EQ4 0x15 /* default 02c */
165#define EQ1_EQ3DMODE (1 << 8) 164#define EQ5 0x16 /* default 02c */
165/* note: WM8758 curruently runs on low power mode. 3 peaking filters
166 * and 3D will work when M128ENB is enabled + proper code. */
167#define EQ1_EQ3DMODE (1 << 8) /* default */
166#define EQ_GAIN_MASK 0x1f 168#define EQ_GAIN_MASK 0x1f
167#define EQ_CUTOFF_MASK (3 << 5) 169#define EQ_CUTOFF_MASK (3 << 5)
168#define EQ_GAIN_VALUE(x) (((-x) + 12) & 0x1f) 170#define EQ_GAIN_VALUE(x) (((-x) + 12) & 0x1f)
169#define EQ_CUTOFF_VALUE(x) ((((x) - 1) & 0x03) << 5) 171#define EQ_CUTOFF_VALUE(x) ((((x) - 1) & 0x03) << 5)
170 172
171/* unused */ 173#define DACLIMITER1 0x18 /* default 032 unused */
172#define DACLIMITER1 0x18 174#define DACLIMITER2 0x19 /* default 000 unused */
173#define DACLIMITER2 0x19 175#define NOTCHFILTER1 0x1b /* default 000 unused */
174#define NOTCHFILTER1 0x1b 176#define NOTCHFILTER2 0x1c /* default 000 unused */
175#define NOTCHFILTER2 0x1c 177#define NOTCHFILTER3 0x1d /* default 000 unused */
176#define NOTCHFILTER3 0x1d 178#define NOTCHFILTER4 0x1e /* default 000 unused */
177#define NOTCHFILTER4 0x1e 179#define ALCCONTROL1 0x20 /* default 038 unused */
178#define ALCCONTROL1 0x20 180#define ALCCONTROL2 0x21 /* default 00b unused */
179#define ALCCONTROL2 0x21 181#define ALCCONTROL3 0x22 /* default 032 unused */
180#define ALCCONTROL3 0x22 182#define NOISEGATE 0x23 /* default 000 unused */
181#define NOISEGATE 0x23 183
182 184#define PLLN 0x24 /* default 008 */
183#define PLLN 0x24
184#define PLLN_PLLN_MASK 0x0f 185#define PLLN_PLLN_MASK 0x0f
185#define PLLN_PLLPRESCALE (1 << 4) 186#define PLLN_PLLPRESCALE (1 << 4)
186 187
187#define PLLK1 0x25 188#define PLLK1 0x25 /* default 00c */
188#define PLLK1_MASK 0x3f 189#define PLLK1_MASK 0x3f
189 190
190#define PLLK2 0x26 191#define PLLK2 0x26 /* default 093 */
191#define PLLK3 0x27 192#define PLLK3 0x27 /* default 0e9 */
192 193
193#define THREEDCTRL 0x29 194#define THREEDCTRL 0x29 /* default 000 */
194#define THREEDCTRL_DEPTH3D_MASK 0x0f 195#define THREEDCTRL_DEPTH3D_MASK 0x0f
195 196
196#define OUT4TOADC 0x2a 197#define OUT4TOADC 0x2a /* default 000 */
197#define OUT4TOADC_OUT1DEL (1 << 0) 198#define OUT4TOADC_OUT1DEL (1 << 0)
198#define OUT4TOADC_DELEN (1 << 1) 199#define OUT4TOADC_DELEN (1 << 1)
199#define OUT4TOADC_POBCTRL (1 << 2) 200#define OUT4TOADC_POBCTRL (1 << 2)
201#define OUT4TOADC_OUT2DEL (1 << 3)
202#define OUT4TOADC_VMIDTOG (1 << 4)
200#define OUT4TOADC_OUT4_2LNR (1 << 5) 203#define OUT4TOADC_OUT4_2LNR (1 << 5)
201#define OUT4TOADC_OUT4_ADCVOL_MASK (7 << 6) 204#define OUT4TOADC_OUT4_ADCVOL_MASK (7 << 6)
202 205
203#define BEEPCTRL 0x2b 206#define BEEPCTRL 0x2b /* default 000 */
204#define BEEPCTRL_BEEPEN (1 << 0) 207#define BEEPCTRL_DELEN2 (1 << 2)
205#define BEEPCTRL_BEEPVOL_MASK (7 << 1)
206#define BEEPCTRL_INVROUT2 (1 << 4)
207#define BEEPCTRL_MUTERPGA2INV (1 << 5)
208#define BEEPCTRL_BYPR2LMIX (1 << 7) 208#define BEEPCTRL_BYPR2LMIX (1 << 7)
209#define BEEPCTRL_BYPL2RMIX (1 << 8) 209#define BEEPCTRL_BYPL2RMIX (1 << 8)
210 210
211#define INCTRL 0x2c 211#define INCTRL 0x2c /* default 003 */
212#define INCTRL_LIP2INPGA (1 << 0) 212#define INCTRL_LIP2INPGA (1 << 0) /* default */
213#define INCTRL_LIN2INPGA (1 << 1) 213#define INCTRL_LIN2INPGA (1 << 1) /* default */
214#define INCTRL_L2_2INPGA (1 << 2) 214#define INCTRL_L2_2INPGA (1 << 2)
215#define INCTRL_RIP2INPGA (1 << 4) 215#define INCTRL_RIP2INPGA (1 << 4)
216#define INCTRL_RIN2INPGA (1 << 5) 216#define INCTRL_RIN2INPGA (1 << 5)
217#define INCTRL_R2_2INPGA (1 << 6) 217#define INCTRL_R2_2INPGA (1 << 6)
218#define INCTRL_MBVSEL (1 << 8) 218#define INCTRL_MBVSEL (1 << 8)
219 219
220#define LINPGAVOL 0x2d 220#define LINPGAVOL 0x2d /* default 010 */
221#define LINPGAVOL_INPGAVOL_MASK 0x3f 221#define LINPGAVOL_INPGAVOL_MASK 0x3f
222#define LINPGAVOL_INPGAMUTEL (1 << 6) 222#define LINPGAVOL_INPGAMUTEL (1 << 6)
223#define LINPGAVOL_INPGAZCL (1 << 7) 223#define LINPGAVOL_INPGAZCL (1 << 7)
224#define LINPGAVOL_INPGAVU (1 << 8) 224#define LINPGAVOL_INPGAVU (1 << 8)
225 225
226#define RINPGAVOL 0x2e 226#define RINPGAVOL 0x2e /* default 010 */
227#define RINPGAVOL_INPGAVOL_MASK 0x3f 227#define RINPGAVOL_INPGAVOL_MASK 0x3f
228#define RINPGAVOL_INPGAMUTER (1 << 6) 228#define RINPGAVOL_INPGAMUTER (1 << 6)
229#define RINPGAVOL_INPGAZCR (1 << 7) 229#define RINPGAVOL_INPGAZCR (1 << 7)
230#define RINPGAVOL_INPGAVU (1 << 8) 230#define RINPGAVOL_INPGAVU (1 << 8)
231 231
232#define LADCBOOST 0x2f 232#define LADCBOOST 0x2f /* default 100 */
233#define LADCBOOST_AUXL2BOOST_MASK (7 << 0)
234#define LADCBOOST_L2_2BOOST_MASK (7 << 4) 233#define LADCBOOST_L2_2BOOST_MASK (7 << 4)
235#define LADCBOOST_L2_2BOOST(x) ((x) << 4) 234#define LADCBOOST_L2_2BOOST(x) ((x) << 4)
236#define LADCBOOST_PGABOOSTL (1 << 8) 235#define LADCBOOST_PGABOOSTL (1 << 8) /* default */
237 236
238#define RADCBOOST 0x30 237#define RADCBOOST 0x30 /* default 100 */
239#define RADCBOOST_AUXR2BOOST_MASK (7 << 0)
240#define RADCBOOST_R2_2BOOST_MASK (7 << 4) 238#define RADCBOOST_R2_2BOOST_MASK (7 << 4)
241#define RADCBOOST_R2_2BOOST(x) ((x) << 4) 239#define RADCBOOST_R2_2BOOST(x) ((x) << 4)
242#define RADCBOOST_PGABOOSTR (1 << 8) 240#define RADCBOOST_PGABOOSTR (1 << 8) /* default */
243 241
244#define OUTCTRL 0x31 242#define OUTCTRL 0x31 /* default 002 */
245#define OUTCTRL_VROI (1 << 0) 243#define OUTCTRL_VROI (1 << 0)
246#define OUTCTRL_TSDEN (1 << 1) 244#define OUTCTRL_TSDEN (1 << 1) /* default */
247#define OUTCTRL_SPKBOOST (1 << 2) 245#define OUTCTRL_TSOPCTRL (1 << 2)
248#define OUTCTRL_OUT3BOOST (1 << 3) 246#define OUTCTRL_OUT3ENDEL (1 << 3)
249#define OUTCTRL_OUT4BOOST (1 << 4) 247#define OUTCTRL_OUT4ENDEL (1 << 4)
250#define OUTCTRL_DACR2LMIX (1 << 5) 248#define OUTCTRL_DACR2LMIX (1 << 5)
251#define OUTCTRL_DACL2RMIX (1 << 6) 249#define OUTCTRL_DACL2RMIX (1 << 6)
250#define OUTCTRL_LINE_COM (1 << 7)
251#define OUTCTRL_HP_COM (1 << 8)
252 252
253#define LOUTMIX 0x32 253#define LOUTMIX 0x32 /* default 001 */
254#define LOUTMIX_DACL2LMIX (1 << 0) 254#define LOUTMIX_DACL2LMIX (1 << 0) /* default */
255#define LOUTMIX_BYPL2LMIX (1 << 1) 255#define LOUTMIX_BYPL2LMIX (1 << 1)
256#define LOUTMIX_BYP2LMIXVOL_MASK (7 << 2) 256#define LOUTMIX_BYP2LMIXVOL_MASK (7 << 2)
257#define LOUTMIX_BYP2LMIXVOL(x) ((x) << 2) 257#define LOUTMIX_BYP2LMIXVOL(x) ((x) << 2)
258#define LOUTMIX_AUXL2LMIX (1 << 5)
259#define LOUTMIX_AUXLMIXVOL_MASK (7 << 6)
260 258
261#define ROUTMIX 0x33 259#define ROUTMIX 0x33 /* default 001 */
262#define ROUTMIX_DACR2RMIX (1 << 0) 260#define ROUTMIX_DACR2RMIX (1 << 0) /* default */
263#define ROUTMIX_BYPR2RMIX (1 << 1) 261#define ROUTMIX_BYPR2RMIX (1 << 1)
264#define ROUTMIX_BYP2RMIXVOL_MASK (7 << 2) 262#define ROUTMIX_BYP2RMIXVOL_MASK (7 << 2)
265#define ROUTMIX_BYP2RMIXVOL(x) ((x) << 2) 263#define ROUTMIX_BYP2RMIXVOL(x) ((x) << 2)
266#define ROUTMIX_AUXR2RMIX (1 << 5)
267#define ROUTMIX_AUXRMIXVOL_MASK (7 << 6)
268 264
269#define LOUT1VOL 0x34 265#define LOUT1VOL 0x34 /* default 039 */
270#define LOUT1VOL_MASK 0x3f 266#define LOUT1VOL_MASK 0x3f
271#define LOUT1VOL_LOUT1MUTE (1 << 6) 267#define LOUT1VOL_LOUT1MUTE (1 << 6)
272#define LOUT1VOL_LOUT1ZC (1 << 7) 268#define LOUT1VOL_LOUT1ZC (1 << 7)
273#define LOUT1VOL_OUT1VU (1 << 8) 269#define LOUT1VOL_OUT1VU (1 << 8)
274 270
275#define ROUT1VOL 0x35 271#define ROUT1VOL 0x35 /* default 039 */
276#define ROUT1VOL_MASK 0x3f 272#define ROUT1VOL_MASK 0x3f
277#define ROUT1VOL_ROUT1MUTE (1 << 6) 273#define ROUT1VOL_ROUT1MUTE (1 << 6)
278#define ROUT1VOL_ROUT1ZC (1 << 7) 274#define ROUT1VOL_ROUT1ZC (1 << 7)
279#define ROUT1VOL_OUT1VU (1 << 8) 275#define ROUT1VOL_OUT1VU (1 << 8)
280 276
281#define LOUT2VOL 0x36 277#define LOUT2VOL 0x36 /* default 039 */
282#define LOUT2VOL_MASK 0x3f 278#define LOUT2VOL_MASK 0x3f
283#define LOUT2VOL_LOUT2MUTE (1 << 6) 279#define LOUT2VOL_LOUT2MUTE (1 << 6)
284#define LOUT2VOL_LOUT2ZC (1 << 7) 280#define LOUT2VOL_LOUT2ZC (1 << 7)
285#define LOUT2VOL_OUT2VU (1 << 8) 281#define LOUT2VOL_OUT2VU (1 << 8)
286 282
287#define ROUT2VOL 0x37 283#define ROUT2VOL 0x37 /* default 039 */
288#define ROUT2VOL_MASK 0x3f 284#define ROUT2VOL_MASK 0x3f
289#define ROUT2VOL_ROUT2MUTE (1 << 6) 285#define ROUT2VOL_ROUT2MUTE (1 << 6)
290#define ROUT2VOL_ROUT2ZC (1 << 7) 286#define ROUT2VOL_ROUT2ZC (1 << 7)
291#define ROUT2VOL_OUT2VU (1 << 8) 287#define ROUT2VOL_OUT2VU (1 << 8)
292 288
289#define OUT3MIX 0x38 /* default 001 */
290#define OUT3MIX_LDAC2OUT3 (1 << 0) /* default */
291#define OUT3MIX_LMIX2OUT3 (1 << 1)
292#define OUT3MIX_BYPL2OUT3 (1 << 2)
293#define OUT3MIX_OUT4_2OUT3 (1 << 3)
294#define OUT3MIX_OUT3MUTE (1 << 6)
295
296#define OUT4MIX 0x39 /* default 001 */
297#define OUT4MIX_RDAC2OUT4 (1 << 0) /* default */
298#define OUT4MIX_RMIX2OUT4 (1 << 1)
299#define OUT4MIX_BYPR2OUT4 (1 << 2)
300#define OUT4MIX_LDAC2OUT4 (1 << 3)
301#define OUT4MIX_LMIX2OUT4 (1 << 4)
302#define OUT4MIX_OUT4ATTN (1 << 5)
303#define OUT4MIX_OUT4MUTE (1 << 6)
304#define OUT4MIX_OUT3_2OUT4 (1 << 7)
305
306#define BIASCTRL 0x3d /* default 000 */
307#define BIASCTRL_HALFOPBIAS (1 << 0)
308#define BIASCTRL_HALFI_IPGA (1 << 6)
309#define BIASCTRL_BIASCUT (1 << 8)
293 310
294/* Dummy definition, to be removed when the audio driver API gets reworked. */ 311/* Dummy definition, to be removed when the audio driver API gets reworked. */
295#define WM8758_44100HZ 0 312#define WM8758_44100HZ 0