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author | Michael Sparmann <theseven@rockbox.org> | 2009-10-24 20:31:40 +0000 |
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committer | Michael Sparmann <theseven@rockbox.org> | 2009-10-24 20:31:40 +0000 |
commit | ef6e1c4eaac6ead12a8ca28a004a1826d9c92d4e (patch) | |
tree | c27898b8a0ff4db44bc707e36559d17585829d09 | |
parent | 791f9c2a1913550041c2998d7c87e053f58ec5ad (diff) | |
download | rockbox-ef6e1c4eaac6ead12a8ca28a004a1826d9c92d4e.tar.gz rockbox-ef6e1c4eaac6ead12a8ca28a004a1826d9c92d4e.zip |
Plumb an iPod Nano 2G battery leak that started spilling as soon as USB was used at least once until a reboot.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23335 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/target/arm/usb-s3c6400x.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/firmware/target/arm/usb-s3c6400x.c b/firmware/target/arm/usb-s3c6400x.c index 3034cf8029..689fc530d0 100644 --- a/firmware/target/arm/usb-s3c6400x.c +++ b/firmware/target/arm/usb-s3c6400x.c | |||
@@ -370,9 +370,10 @@ void usb_drv_exit(void) | |||
370 | { | 370 | { |
371 | DCTL = 0x802; /* Soft Disconnect */ | 371 | DCTL = 0x802; /* Soft Disconnect */ |
372 | 372 | ||
373 | ORSTCON = 1; /* Put the PHY into reset (needed to get current down) */ | ||
374 | PCGCCTL = 1; /* Shut down PHY clock */ | ||
373 | OPHYPWR = 0xF; /* PHY: Power down */ | 375 | OPHYPWR = 0xF; /* PHY: Power down */ |
374 | 376 | ||
375 | PCGCCTL = 1; /* Mask clocks */ | ||
376 | PWRCON |= 0x4000; | 377 | PWRCON |= 0x4000; |
377 | PWRCONEXT |= 0x800; | 378 | PWRCONEXT |= 0x800; |
378 | } | 379 | } |
@@ -406,12 +407,12 @@ int usb_detect(void) | |||
406 | #else | 407 | #else |
407 | void usb_init_device(void) | 408 | void usb_init_device(void) |
408 | { | 409 | { |
409 | /* simply switch USB off for now */ | ||
410 | DCTL = 0x802; /* Soft Disconnect */ | 410 | DCTL = 0x802; /* Soft Disconnect */ |
411 | 411 | ||
412 | ORSTCON = 1; /* Put the PHY into reset (needed to get current down) */ | ||
413 | PCGCCTL = 1; /* Shut down PHY clock */ | ||
412 | OPHYPWR = 0xF; /* PHY: Power down */ | 414 | OPHYPWR = 0xF; /* PHY: Power down */ |
413 | 415 | ||
414 | PCGCCTL = 1; /* Mask clocks */ | ||
415 | PWRCON |= 0x4000; | 416 | PWRCON |= 0x4000; |
416 | PWRCONEXT |= 0x800; | 417 | PWRCONEXT |= 0x800; |
417 | } | 418 | } |