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authorJack Halpin <jack.halpin@gmail.com>2009-06-30 17:56:21 +0000
committerJack Halpin <jack.halpin@gmail.com>2009-06-30 17:56:21 +0000
commite905ca61d4a2d90d9a2fac0ae1b70c55451eaf88 (patch)
tree206e7e775ea159e466322202293d87ae9842a770
parent8c22a60290bb9727a48c2bde94ab38f18c7e847d (diff)
downloadrockbox-e905ca61d4a2d90d9a2fac0ae1b70c55451eaf88.tar.gz
rockbox-e905ca61d4a2d90d9a2fac0ae1b70c55451eaf88.zip
FS#10344 - AMSSansa Dynamically adjust core voltage to extend playtime.
Lower CVDD core voltage to 1.10 volts when the frequency is less than 200 MHz. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21577 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/target/arm/as3525/ascodec-target.h14
-rw-r--r--firmware/target/arm/as3525/debug-as3525.c6
-rw-r--r--firmware/target/arm/as3525/system-as3525.c17
3 files changed, 30 insertions, 7 deletions
diff --git a/firmware/target/arm/as3525/ascodec-target.h b/firmware/target/arm/as3525/ascodec-target.h
index c31a1bab0c..3464bbaa51 100644
--- a/firmware/target/arm/as3525/ascodec-target.h
+++ b/firmware/target/arm/as3525/ascodec-target.h
@@ -27,6 +27,20 @@
27 27
28#include "as3514.h" 28#include "as3514.h"
29 29
30/* Charge Pump and Power management Settings */
31#define AS314_CP_DCDC3_SETTING \
32 ((0<<7) | /* CP_SW Auto-Switch Margin 0=200/300 1=150/255 */ \
33 (0<<6) | /* CP_on 0=Normal op 1=Chg Pump Always On */ \
34 (0<<5) | /* LREG_CPnot Always write 0 */ \
35 (0<<3) | /* DCDC3p BVDD setting 3.6/3.2/3.1/3.0 */ \
36 (1<<2) | /* LREG_off 1=Auto mode switching 0=Length Reg only*/\
37 (0<<0) ) /* CVDDp Core Voltage Setting 1.2/1.15/1.10/1.05*/
38
39#define CVDD_1_20 0
40#define CVDD_1_15 1
41#define CVDD_1_10 2
42#define CVDD_1_05 3
43
30void ascodec_init(void); 44void ascodec_init(void);
31 45
32int ascodec_write(unsigned int index, unsigned int value); 46int ascodec_write(unsigned int index, unsigned int value);
diff --git a/firmware/target/arm/as3525/debug-as3525.c b/firmware/target/arm/as3525/debug-as3525.c
index 39f590302d..aade54ca38 100644
--- a/firmware/target/arm/as3525/debug-as3525.c
+++ b/firmware/target/arm/as3525/debug-as3525.c
@@ -28,6 +28,7 @@
28#include "sprintf.h" 28#include "sprintf.h"
29#include "cpu.h" 29#include "cpu.h"
30#include "pl180.h" 30#include "pl180.h"
31#include "ascodec-target.h"
31 32
32#define _DEBUG_PRINTF(a,varargs...) do { \ 33#define _DEBUG_PRINTF(a,varargs...) do { \
33 snprintf(buf, sizeof(buf), (a), ##varargs); lcd_puts(0,line++,buf); \ 34 snprintf(buf, sizeof(buf), (a), ##varargs); lcd_puts(0,line++,buf); \
@@ -280,7 +281,10 @@ bool __dbg_hw_info(void)
280 _DEBUG_PRINTF("SD :%3dkHz %3dkHz", AS3525_SD_IDENT_FREQ/1000,calc_freq(CLK_SD_IDENT_NAND)/1000); 281 _DEBUG_PRINTF("SD :%3dkHz %3dkHz", AS3525_SD_IDENT_FREQ/1000,calc_freq(CLK_SD_IDENT_NAND)/1000);
281 _DEBUG_PRINTF("MSD :%3dkHz %3dkHz", AS3525_SD_IDENT_FREQ/1000,calc_freq(CLK_SD_IDENT_MSD)/1000); 282 _DEBUG_PRINTF("MSD :%3dkHz %3dkHz", AS3525_SD_IDENT_FREQ/1000,calc_freq(CLK_SD_IDENT_MSD)/1000);
282 _DEBUG_PRINTF("USB: %3dMHz", calc_freq(CLK_USB)/1000000); 283 _DEBUG_PRINTF("USB: %3dMHz", calc_freq(CLK_USB)/1000000);
283 _DEBUG_PRINTF("MMU: %s", (read_cp15() & CP15_MMU) ? " op" : "nop"); 284 ascodec_write(AS3514_ADC_0, 4<<4); /* ADC Source = CVDD */
285 _DEBUG_PRINTF("MMU: %s CVDDP:%4d", (read_cp15() & CP15_MMU) ? " op" : "nop",
286 ((ascodec_read(AS3514_ADC_1) |
287 ((ascodec_read(AS3514_ADC_0) & 3)<<8)) * 25));
284 _DEBUG_PRINTF("Icache:%s Dcache:%s",(read_cp15() & CP15_IC) ? " op" : "nop", 288 _DEBUG_PRINTF("Icache:%s Dcache:%s",(read_cp15() & CP15_IC) ? " op" : "nop",
285 (read_cp15() & CP15_DC) ? " op" : "nop"); 289 (read_cp15() & CP15_DC) ? " op" : "nop");
286 290
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index ecb9736f78..b77f3dee9b 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -271,7 +271,6 @@ void system_init(void)
271 AS3525_PCLK_SEL); 271 AS3525_PCLK_SEL);
272 272
273 asm volatile( 273 asm volatile(
274 "mov r0, #0 \n"
275 "mrc p15, 0, r0, c1, c0 \n" /* control register */ 274 "mrc p15, 0, r0, c1, c0 \n" /* control register */
276 "bic r0, r0, #3<<30 \n" /* clears bus bits : sets fastbus */ 275 "bic r0, r0, #3<<30 \n" /* clears bus bits : sets fastbus */
277 "mcr p15, 0, r0, c1, c0 \n" 276 "mcr p15, 0, r0, c1, c0 \n"
@@ -295,10 +294,8 @@ void system_init(void)
295 ascodec_init(); 294 ascodec_init();
296 295
297#ifndef BOOTLOADER 296#ifndef BOOTLOADER
298 /* Disable fast hardware power-off, to use power button normally 297 /* Initialize power management settings */
299 * We don't need the power button in the bootloader. */ 298 ascodec_write(AS3514_CVDD_DCDC3, AS314_CP_DCDC3_SETTING);
300 ascodec_write(AS3514_CVDD_DCDC3, ascodec_read(AS3514_CVDD_DCDC3) & (1<<2));
301
302#ifdef CONFIG_TUNER 299#ifdef CONFIG_TUNER
303 fmradio_i2c_init(); 300 fmradio_i2c_init();
304#endif 301#endif
@@ -331,7 +328,12 @@ void set_cpu_frequency(long frequency)
331{ 328{
332 if(frequency == CPUFREQ_MAX) 329 if(frequency == CPUFREQ_MAX)
333 { 330 {
334 331 /* Increasing frequency so boost voltage before change */
332 ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_20));
333 /* Confirm voltage is at least 1.20v before making fclk > 200 MHz */
334 ascodec_write(AS3514_ADC_0, 4<<4); /* ADC Source = CVDD */
335 while (ascodec_read(AS3514_ADC_1) < 0xe0); /* 0x1e0 *.0025 = 1.20 */
336 /* e0 = 8LSB's of 0x1e0 */
335 asm volatile( 337 asm volatile(
336 "mrc p15, 0, r0, c1, c0 \n" 338 "mrc p15, 0, r0, c1, c0 \n"
337 339
@@ -355,6 +357,9 @@ void set_cpu_frequency(long frequency)
355 "mcr p15, 0, r0, c1, c0 \n" 357 "mcr p15, 0, r0, c1, c0 \n"
356 : : : "r0" ); 358 : : : "r0" );
357 359
360 /* Decreasing frequency so reduce voltage after change */
361 ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_10));
362
358 cpu_frequency = CPUFREQ_NORMAL; 363 cpu_frequency = CPUFREQ_NORMAL;
359 } 364 }
360} 365}