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authorAmaury Pouly <pamaury@rockbox.org>2011-07-03 15:18:41 +0000
committerAmaury Pouly <pamaury@rockbox.org>2011-07-03 15:18:41 +0000
commite36b20c4a1709ae9fd3020b9f08875c8c03a0912 (patch)
treed17371221234fc16da4e9175fdd0890b7eb58b62
parent22b6def065ab7c2ca030f405577e34104ad20011 (diff)
downloadrockbox-e36b20c4a1709ae9fd3020b9f08875c8c03a0912.tar.gz
rockbox-e36b20c4a1709ae9fd3020b9f08875c8c03a0912.zip
imx233/fuze+: replace software i2c by hardware i2c, make some code more correct, reduce code size of lcd init sequences
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30120 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/SOURCES4
-rw-r--r--firmware/drivers/synaptics-rmi.c22
-rw-r--r--firmware/export/i2c.h1
-rw-r--r--firmware/export/synaptics-rmi.h2
-rw-r--r--firmware/target/arm/imx233/clkctrl-imx233.h5
-rw-r--r--firmware/target/arm/imx233/dma-imx233.h2
-rw-r--r--firmware/target/arm/imx233/pinctrl-imx233.h3
-rw-r--r--firmware/target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c66
-rw-r--r--firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c350
-rw-r--r--firmware/target/arm/imx233/ssp-imx233.c4
-rw-r--r--firmware/target/arm/imx233/system-imx233.c10
-rw-r--r--firmware/target/arm/imx233/system-target.h2
12 files changed, 237 insertions, 234 deletions
diff --git a/firmware/SOURCES b/firmware/SOURCES
index 12774b051f..a4be2a5f25 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -488,6 +488,8 @@ target/arm/pnx0101/timer-pnx0101.c
488#endif 488#endif
489 489
490#if CONFIG_CPU == IMX233 490#if CONFIG_CPU == IMX233
491target/arm/imx233/i2c-imx233.c
492target/arm/imx233/lcdif-imx233.c
491target/arm/imx233/clkctrl-imx233.c 493target/arm/imx233/clkctrl-imx233.c
492target/arm/imx233/system-imx233.c 494target/arm/imx233/system-imx233.c
493target/arm/imx233/timrot-imx233.c 495target/arm/imx233/timrot-imx233.c
@@ -1448,13 +1450,11 @@ target/arm/as3525/lcd-as-e200v2-fuze-fuzev2.S
1448#ifdef SANSA_FUZEPLUS 1450#ifdef SANSA_FUZEPLUS
1449#ifndef SIMULATOR 1451#ifndef SIMULATOR
1450#ifndef BOOTLOADER 1452#ifndef BOOTLOADER
1451drivers/generic_i2c.c
1452drivers/synaptics-rmi.c 1453drivers/synaptics-rmi.c
1453#endif 1454#endif
1454target/arm/imx233/sansa-fuzeplus/backlight-fuzeplus.c 1455target/arm/imx233/sansa-fuzeplus/backlight-fuzeplus.c
1455target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c 1456target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c
1456target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c 1457target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c
1457target/arm/imx233/lcdif-imx233.c
1458#endif /* SIMULATOR */ 1458#endif /* SIMULATOR */
1459#endif 1459#endif
1460 1460
diff --git a/firmware/drivers/synaptics-rmi.c b/firmware/drivers/synaptics-rmi.c
index c6a1bae168..c979927fee 100644
--- a/firmware/drivers/synaptics-rmi.c
+++ b/firmware/drivers/synaptics-rmi.c
@@ -19,20 +19,18 @@
19 * 19 *
20 ****************************************************************************/ 20 ****************************************************************************/
21#include "system.h" 21#include "system.h"
22#include "generic_i2c.h"
23#include "synaptics-rmi.h" 22#include "synaptics-rmi.h"
23#include "i2c.h"
24 24
25static int rmi_cur_page; 25static int rmi_cur_page;
26static int rmi_i2c_addr; 26static int rmi_i2c_addr;
27static int rmi_i2c_bus;
28 27
29/* NOTE: 28/* NOTE:
30 * RMI over i2c supports some special aliases on page 0x2 but this driver don't 29 * RMI over i2c supports some special aliases on page 0x2 but this driver don't
31 * use them */ 30 * use them */
32 31
33int rmi_init(int i2c_bus_index, int i2c_dev_addr) 32int rmi_init(int i2c_dev_addr)
34{ 33{
35 rmi_i2c_bus = i2c_bus_index;
36 rmi_i2c_addr = i2c_dev_addr; 34 rmi_i2c_addr = i2c_dev_addr;
37 rmi_cur_page = 0x4; 35 rmi_cur_page = 0x4;
38 return 0; 36 return 0;
@@ -44,7 +42,7 @@ static int rmi_select_page(unsigned char page)
44 if(page != rmi_cur_page) 42 if(page != rmi_cur_page)
45 { 43 {
46 rmi_cur_page = page; 44 rmi_cur_page = page;
47 return i2c_write_data(rmi_i2c_bus, rmi_i2c_addr, RMI_PAGE_SELECT, &page, 1); 45 return i2c_writemem(rmi_i2c_addr, RMI_PAGE_SELECT, &page, 1);
48 } 46 }
49 else 47 else
50 return 0; 48 return 0;
@@ -52,9 +50,10 @@ static int rmi_select_page(unsigned char page)
52 50
53int rmi_read(int address, int byte_count, unsigned char *buffer) 51int rmi_read(int address, int byte_count, unsigned char *buffer)
54{ 52{
55 if(rmi_select_page(address >> 8) < 0) 53 int ret;
56 return -1; 54 if((ret = rmi_select_page(address >> 8)) < 0)
57 return i2c_read_data(rmi_i2c_bus, rmi_i2c_addr, address & 0xff, buffer, byte_count); 55 return ret;
56 return i2c_readmem(rmi_i2c_addr, address & 0xff, buffer, byte_count);
58} 57}
59 58
60int rmi_read_single(int address) 59int rmi_read_single(int address)
@@ -66,9 +65,10 @@ int rmi_read_single(int address)
66 65
67int rmi_write(int address, int byte_count, const unsigned char *buffer) 66int rmi_write(int address, int byte_count, const unsigned char *buffer)
68{ 67{
69 if(rmi_select_page(address >> 8) < 0) 68 int ret;
70 return -1; 69 if((ret = rmi_select_page(address >> 8)) < 0)
71 return i2c_write_data(rmi_i2c_bus, rmi_i2c_addr, address & 0xff, buffer, byte_count); 70 return ret;
71 return i2c_writemem(rmi_i2c_addr, address & 0xff, buffer, byte_count);
72} 72}
73 73
74int rmi_write_single(int address, unsigned char byte) 74int rmi_write_single(int address, unsigned char byte)
diff --git a/firmware/export/i2c.h b/firmware/export/i2c.h
index 49529c4635..ac9ddba055 100644
--- a/firmware/export/i2c.h
+++ b/firmware/export/i2c.h
@@ -27,6 +27,7 @@ extern void i2c_end(void);
27extern int i2c_write(int device, const unsigned char* buf, int count ); 27extern int i2c_write(int device, const unsigned char* buf, int count );
28extern int i2c_read(int device, unsigned char* buf, int count ); 28extern int i2c_read(int device, unsigned char* buf, int count );
29extern int i2c_readmem(int device, int address, unsigned char* buf, int count ); 29extern int i2c_readmem(int device, int address, unsigned char* buf, int count );
30extern int i2c_writemem(int device, int address, const unsigned char* buf, int count );
30extern void i2c_outb(unsigned char byte); 31extern void i2c_outb(unsigned char byte);
31extern unsigned char i2c_inb(int ack); 32extern unsigned char i2c_inb(int ack);
32extern void i2c_start(void); 33extern void i2c_start(void);
diff --git a/firmware/export/synaptics-rmi.h b/firmware/export/synaptics-rmi.h
index 2d7a0c8c1e..38a9955dcc 100644
--- a/firmware/export/synaptics-rmi.h
+++ b/firmware/export/synaptics-rmi.h
@@ -114,7 +114,7 @@ struct rmi_2d_gesture_data_t
114 * the generic_i2c driver; the i2c_dev_addr is the i2c address of the device. 114 * the generic_i2c driver; the i2c_dev_addr is the i2c address of the device.
115 * NOTE: the driver automatically handles the page select mechanism used for 115 * NOTE: the driver automatically handles the page select mechanism used for
116 * RMI over i2c and assumes a standard page select register at 0xff. */ 116 * RMI over i2c and assumes a standard page select register at 0xff. */
117int rmi_init(int i2c_bus_index, int i2c_dev_addr); 117int rmi_init(int i2c_dev_addr);
118/* Read one or more registers. 118/* Read one or more registers.
119 * WARNING: don't cross a page boundary ! */ 119 * WARNING: don't cross a page boundary ! */
120int rmi_read(int address, int byte_count, unsigned char *buffer); 120int rmi_read(int address, int byte_count, unsigned char *buffer);
diff --git a/firmware/target/arm/imx233/clkctrl-imx233.h b/firmware/target/arm/imx233/clkctrl-imx233.h
index 2a12129171..f1a51e25b2 100644
--- a/firmware/target/arm/imx233/clkctrl-imx233.h
+++ b/firmware/target/arm/imx233/clkctrl-imx233.h
@@ -42,6 +42,11 @@
42#define HW_CLKCTRL_HBUS__DIV_BP 0 42#define HW_CLKCTRL_HBUS__DIV_BP 0
43#define HW_CLKCTRL_HBUS__DIV_BM 0x1f 43#define HW_CLKCTRL_HBUS__DIV_BM 0x1f
44 44
45#define HW_CLKCTRL_XBUS (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x40))
46#define HW_CLKCTRL_XBUS__DIV_BP 0
47#define HW_CLKCTRL_XBUS__DIV_BM 0x3ff
48#define HW_CLKCTRL_XBUS__BUSY (1 << 31)
49
45#define HW_CLKCTRL_XTAL (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x50)) 50#define HW_CLKCTRL_XTAL (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x50))
46#define HW_CLKCTRL_XTAL__TIMROT_CLK32K_GATE (1 << 26) 51#define HW_CLKCTRL_XTAL__TIMROT_CLK32K_GATE (1 << 26)
47 52
diff --git a/firmware/target/arm/imx233/dma-imx233.h b/firmware/target/arm/imx233/dma-imx233.h
index ce13aba89f..fcf1a2c5c2 100644
--- a/firmware/target/arm/imx233/dma-imx233.h
+++ b/firmware/target/arm/imx233/dma-imx233.h
@@ -73,6 +73,7 @@
73/* APHX channels */ 73/* APHX channels */
74#define HW_APBX_AUDIO_ADC 0 74#define HW_APBX_AUDIO_ADC 0
75#define HW_APBX_AUDIO_DAC 1 75#define HW_APBX_AUDIO_DAC 1
76#define HW_APBX_I2C 3
76 77
77#define HW_APBX_BASE 0x80024000 78#define HW_APBX_BASE 0x80024000
78 79
@@ -123,6 +124,7 @@ struct apb_dma_command_t
123 124
124#define APB_SSP(ssp) APBH_DMA_CHANNEL(HW_APBH_SSP(ssp)) 125#define APB_SSP(ssp) APBH_DMA_CHANNEL(HW_APBH_SSP(ssp))
125#define APB_AUDIO_ADC APBX_DMA_CHANNEL(HW_APBX_AUDIO_ADC) 126#define APB_AUDIO_ADC APBX_DMA_CHANNEL(HW_APBX_AUDIO_ADC)
127#define APB_I2C APBX_DMA_CHANNEL(HW_APBX_I2C)
126 128
127#define HW_APB_CHx_CMD__COMMAND_BM 0x3 129#define HW_APB_CHx_CMD__COMMAND_BM 0x3
128#define HW_APB_CHx_CMD__COMMAND__NO_XFER 0 130#define HW_APB_CHx_CMD__COMMAND__NO_XFER 0
diff --git a/firmware/target/arm/imx233/pinctrl-imx233.h b/firmware/target/arm/imx233/pinctrl-imx233.h
index 4e3a9a035e..a2e02adec4 100644
--- a/firmware/target/arm/imx233/pinctrl-imx233.h
+++ b/firmware/target/arm/imx233/pinctrl-imx233.h
@@ -53,8 +53,7 @@
53 53
54static inline void imx233_pinctrl_init(void) 54static inline void imx233_pinctrl_init(void)
55{ 55{
56 __REG_CLR(HW_PINCTRL_CTRL) = __BLOCK_CLKGATE; 56 __REG_CLR(HW_PINCTRL_CTRL) = __BLOCK_CLKGATE | __BLOCK_SFTRST;
57 __REG_CLR(HW_PINCTRL_CTRL) = __BLOCK_SFTRST;
58} 57}
59 58
60static inline void imx233_set_pin_drive_strength(unsigned bank, unsigned pin, unsigned strength) 59static inline void imx233_set_pin_drive_strength(unsigned bank, unsigned pin, unsigned strength)
diff --git a/firmware/target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c b/firmware/target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c
index f6efe6d6a8..1b3a529f2d 100644
--- a/firmware/target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c
+++ b/firmware/target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c
@@ -28,59 +28,6 @@
28#include "string.h" 28#include "string.h"
29 29
30#ifndef BOOTLOADER 30#ifndef BOOTLOADER
31static void i2c_scl_dir(bool out)
32{
33 imx233_enable_gpio_output(0, 30, out);
34}
35
36static void i2c_sda_dir(bool out)
37{
38 imx233_enable_gpio_output(0, 31, out);
39}
40
41static void i2c_scl_out(bool high)
42{
43 imx233_set_gpio_output(0, 30, high);
44}
45
46static void i2c_sda_out(bool high)
47{
48 imx233_set_gpio_output(0, 31, high);
49}
50
51static bool i2c_scl_in(void)
52{
53 return imx233_get_gpio_input_mask(0, 1 << 30);
54}
55
56static bool i2c_sda_in(void)
57{
58 return imx233_get_gpio_input_mask(0, 1 << 31);
59}
60
61static void i2c_delay(int d)
62{
63 udelay(d);
64}
65
66struct i2c_interface btn_i2c =
67{
68 .scl_dir = i2c_scl_dir,
69 .sda_dir = i2c_sda_dir,
70 .scl_out = i2c_scl_out,
71 .sda_out = i2c_sda_out,
72 .scl_in = i2c_scl_in,
73 .sda_in = i2c_sda_in,
74 .delay = i2c_delay,
75 .delay_hd_sta = 4,
76 .delay_hd_dat = 5,
77 .delay_su_dat = 1,
78 .delay_su_sto = 4,
79 .delay_su_sta = 5,
80 .delay_thigh = 4
81};
82
83int rmi_i2c_bus = -1;
84 31
85void button_debug_screen(void) 32void button_debug_screen(void)
86{ 33{
@@ -221,9 +168,6 @@ void button_debug_screen(void)
221 168
222void button_init_device(void) 169void button_init_device(void)
223{ 170{
224 rmi_i2c_bus = i2c_add_node(&btn_i2c);
225 rmi_init(rmi_i2c_bus, 0x40);
226
227 /* Synaptics TouchPad information: 171 /* Synaptics TouchPad information:
228 * - product id: 1533 172 * - product id: 1533
229 * - nr function: 1 (0x10 = 2D touchpad) 173 * - nr function: 1 (0x10 = 2D touchpad)
@@ -244,7 +188,17 @@ void button_init_device(void)
244 * - Resolution: 82 188 * - Resolution: 82
245 * 189 *
246 * ATTENTION line: B0P27 asserted low 190 * ATTENTION line: B0P27 asserted low
191 *
192 * The B0P26 line seems to be related to the touchpad
247 */ 193 */
194
195 /* for touchpad ? */
196 imx233_set_pin_function(0, 26, PINCTRL_FUNCTION_GPIO);
197 imx233_enable_gpio_output(0, 26, false);
198 imx233_set_pin_drive_strength(0, 26, PINCTRL_DRIVE_8mA);
199
200 rmi_init(0x40);
201
248 rmi_write_single(RMI_2D_SENSITIVITY_ADJ, 5); 202 rmi_write_single(RMI_2D_SENSITIVITY_ADJ, 5);
249 rmi_write_single(RMI_2D_GESTURE_SETTINGS, 203 rmi_write_single(RMI_2D_GESTURE_SETTINGS,
250 RMI_2D_GESTURE_PRESS_TIME_300MS | 204 RMI_2D_GESTURE_PRESS_TIME_300MS |
diff --git a/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c b/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c
index f2fbf706d7..bc8a20d2ff 100644
--- a/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c
+++ b/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c
@@ -62,7 +62,6 @@ static void setup_lcd_pins(bool use_lcdif)
62 } 62 }
63 else 63 else
64 { 64 {
65
66 __REG_SET(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */ 65 __REG_SET(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */
67 imx233_enable_gpio_output_mask(1, 0x3ffffff, false); /* lcd_{d{0-17},reset,rs,wr,cs,dotclk,enable,hsync,vsync} */ 66 imx233_enable_gpio_output_mask(1, 0x3ffffff, false); /* lcd_{d{0-17},reset,rs,wr,cs,dotclk,enable,hsync,vsync} */
68 imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */ 67 imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */
@@ -212,6 +211,28 @@ static uint32_t lcd_read_reg(uint32_t reg)
212 return decode_18_to_16(data_in); 211 return decode_18_to_16(data_in);
213} 212}
214 213
214#define REG_MDELAY 0xffffffff
215struct lcd_sequence_entry_t
216{
217 uint32_t reg, data;
218};
219
220static void lcd_send_sequence(struct lcd_sequence_entry_t *seq, unsigned count)
221{
222 for(;count-- > 0; seq++)
223 {
224 if(seq->reg == REG_MDELAY)
225 mdelay(seq->data);
226 else
227 lcd_write_reg(seq->reg, seq->data);
228 }
229}
230
231#define _begin_seq() static struct lcd_sequence_entry_t __seq[] = {
232#define _mdelay(a) {REG_MDELAY, a},
233#define _lcd_write_reg(a, b) {a, b},
234#define _end_seq() }; lcd_send_sequence(__seq, sizeof(__seq) / sizeof(__seq[0]));
235
215static void lcd_init_seq_7783(void) 236static void lcd_init_seq_7783(void)
216{ 237{
217 __REG_SET(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RESET; 238 __REG_SET(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RESET;
@@ -219,131 +240,129 @@ static void lcd_init_seq_7783(void)
219 __REG_CLR(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RESET; 240 __REG_CLR(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RESET;
220 mdelay(10); 241 mdelay(10);
221 __REG_SET(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RESET; 242 __REG_SET(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RESET;
222 mdelay(200); 243
223 lcd_write_reg(1, 0x100); 244 _begin_seq()
224 lcd_write_reg(2, 0x700); 245 _mdelay(200)
225 lcd_write_reg(3, 0x1030); 246 _lcd_write_reg(1, 0x100)
226 lcd_write_reg(7, 0x121); 247 _lcd_write_reg(2, 0x700)
227 lcd_write_reg(8, 0x302); 248 _lcd_write_reg(3, 0x1030)
228 lcd_write_reg(9, 0x200); 249 _lcd_write_reg(7, 0x121)
229 lcd_write_reg(0xa, 0); 250 _lcd_write_reg(8, 0x302)
230 lcd_write_reg(0x10, 0x790); 251 _lcd_write_reg(9, 0x200)
231 lcd_write_reg(0x11, 5); 252 _lcd_write_reg(0xa, 0)
232 lcd_write_reg(0x12, 0); 253 _lcd_write_reg(0x10, 0x790)
233 lcd_write_reg(0x13, 0); 254 _lcd_write_reg(0x11, 5)
234 mdelay(100); 255 _lcd_write_reg(0x12, 0)
235 lcd_write_reg(0x10, 0x12b0); 256 _lcd_write_reg(0x13, 0)
236 mdelay(100); 257 _mdelay(100)
237 lcd_write_reg(0x11, 7); 258 _lcd_write_reg(0x10, 0x12b0)
238 mdelay(100); 259 _mdelay(100)
239 lcd_write_reg(0x12, 0x89); 260 _lcd_write_reg(0x11, 7)
240 lcd_write_reg(0x13, 0x1d00); 261 _mdelay(100)
241 lcd_write_reg(0x29, 0x2f); 262 _lcd_write_reg(0x12, 0x89)
242 mdelay(50); 263 _lcd_write_reg(0x13, 0x1d00)
243 lcd_write_reg(0x30, 0); 264 _lcd_write_reg(0x29, 0x2f)
244 lcd_write_reg(0x31, 0x505); 265 _mdelay(50)
245 lcd_write_reg(0x32, 0x205); 266 _lcd_write_reg(0x30, 0)
246 lcd_write_reg(0x35, 0x206); 267 _lcd_write_reg(0x31, 0x505)
247 lcd_write_reg(0x36, 0x408); 268 _lcd_write_reg(0x32, 0x205)
248 lcd_write_reg(0x37, 0); 269 _lcd_write_reg(0x35, 0x206)
249 lcd_write_reg(0x38, 0x504); 270 _lcd_write_reg(0x36, 0x408)
250 lcd_write_reg(0x39, 0x206); 271 _lcd_write_reg(0x37, 0)
251 lcd_write_reg(0x3c, 0x206); 272 _lcd_write_reg(0x38, 0x504)
252 lcd_write_reg(0x3d, 0x408); 273 _lcd_write_reg(0x39, 0x206)
253 lcd_write_reg(0x50, 0); /* left X ? */ 274 _lcd_write_reg(0x3c, 0x206)
254 lcd_write_reg(0x51, 0xef); /* right X ? */ 275 _lcd_write_reg(0x3d, 0x408)
255 lcd_write_reg(0x52, 0); /* top Y ? */ 276 _lcd_write_reg(0x50, 0) /* left X ? */
256 lcd_write_reg(0x53, 0x13f); /* bottom Y ? */ 277 _lcd_write_reg(0x51, 0xef) /* right X ? */
257 lcd_write_reg(0x20, 0); /* left X ? */ 278 _lcd_write_reg(0x52, 0) /* top Y ? */
258 lcd_write_reg(0x21, 0); /* top Y ? */ 279 _lcd_write_reg(0x53, 0x13f) /* bottom Y ? */
259 lcd_write_reg(0x60, 0xa700); 280 _lcd_write_reg(0x20, 0) /* left X ? */
260 lcd_write_reg(0x61, 1); 281 _lcd_write_reg(0x21, 0) /* top Y ? */
261 lcd_write_reg(0x90, 0x33); 282 _lcd_write_reg(0x60, 0xa700)
262 lcd_write_reg(0x2b, 0xa); 283 _lcd_write_reg(0x61, 1)
263 lcd_write_reg(9, 0); 284 _lcd_write_reg(0x90, 0x33)
264 lcd_write_reg(7, 0x133); 285 _lcd_write_reg(0x2b, 0xa)
265 mdelay(50); 286 _lcd_write_reg(9, 0)
266 lcd_write_reg(0x22, 0); 287 _lcd_write_reg(7, 0x133)
288 _mdelay(50)
289 _lcd_write_reg(0x22, 0)
290 _end_seq()
267} 291}
268 292
269static void lcd_init_seq_9325(void) 293static void lcd_init_seq_9325(void)
270{ 294{
271 lcd_write_reg(0xe5, 0x78f0); 295 _begin_seq()
272 lcd_write_reg(0xe3, 0x3008); 296 _lcd_write_reg(0xe5, 0x78f0)
273 lcd_write_reg(0xe7, 0x12); 297 _lcd_write_reg(0xe3, 0x3008)
274 lcd_write_reg(0xef, 0x1231); 298 _lcd_write_reg(0xe7, 0x12)
275 lcd_write_reg(0, 1); 299 _lcd_write_reg(0xef, 0x1231)
276 lcd_write_reg(1, 0x100); 300 _lcd_write_reg(0, 1)
277 lcd_write_reg(2, 0x700); 301 _lcd_write_reg(1, 0x100)
278 lcd_write_reg(3, 0x1030); 302 _lcd_write_reg(2, 0x700)
279 lcd_write_reg(4, 0); 303 _lcd_write_reg(3, 0x1030)
280 lcd_write_reg(8, 0x207); 304 _lcd_write_reg(4, 0)
281 lcd_write_reg(9, 0); 305 _lcd_write_reg(8, 0x207)
282 lcd_write_reg(0xa, 0); 306 _lcd_write_reg(9, 0)
283 lcd_write_reg(0xc, 0); 307 _lcd_write_reg(0xa, 0)
284 lcd_write_reg(0xd, 0); 308 _lcd_write_reg(0xc, 0)
285 lcd_write_reg(0xf, 0); 309 _lcd_write_reg(0xd, 0)
286 lcd_write_reg(0x10, 0); 310 _lcd_write_reg(0xf, 0)
287 lcd_write_reg(0x11, 7); 311 _lcd_write_reg(0x10, 0)
288 lcd_write_reg(0x12, 0); 312 _lcd_write_reg(0x11, 7)
289 lcd_write_reg(0x13, 0); 313 _lcd_write_reg(0x12, 0)
290 mdelay(20); 314 _lcd_write_reg(0x13, 0)
291 lcd_write_reg(0x10, 0x1290); 315 _mdelay(20)
292 lcd_write_reg(0x11, 7); 316 _lcd_write_reg(0x10, 0x1290)
293 mdelay(50); 317 _lcd_write_reg(0x11, 7)
294 lcd_write_reg(0x12, 0x19); 318 _mdelay(50)
295 mdelay(50); 319 _lcd_write_reg(0x12, 0x19)
296 lcd_write_reg(0x13, 0x1700); 320 _mdelay(50)
297 lcd_write_reg(0x29, 0x14); 321 _lcd_write_reg(0x13, 0x1700)
298 mdelay(50); 322 _lcd_write_reg(0x29, 0x14)
299 lcd_write_reg(0x20, 0); 323 _mdelay(50)
300 lcd_write_reg(0x21, 0); 324 _lcd_write_reg(0x20, 0)
301 lcd_write_reg(0x30, 0x504); 325 _lcd_write_reg(0x21, 0)
302 lcd_write_reg(0x31, 7); 326 _lcd_write_reg(0x30, 0x504)
303 lcd_write_reg(0x32, 6); 327 _lcd_write_reg(0x31, 7)
304 lcd_write_reg(0x35, 0x106); 328 _lcd_write_reg(0x32, 6)
305 lcd_write_reg(0x36, 0x202); 329 _lcd_write_reg(0x35, 0x106)
306 lcd_write_reg(0x37, 0x504); 330 _lcd_write_reg(0x36, 0x202)
307 lcd_write_reg(0x38, 0x500); 331 _lcd_write_reg(0x37, 0x504)
308 lcd_write_reg(0x39, 0x706); 332 _lcd_write_reg(0x38, 0x500)
309 lcd_write_reg(0x3c, 0x204); 333 _lcd_write_reg(0x39, 0x706)
310 lcd_write_reg(0x3d, 0x202); 334 _lcd_write_reg(0x3c, 0x204)
311 lcd_write_reg(0x50, 0); 335 _lcd_write_reg(0x3d, 0x202)
312 lcd_write_reg(0x51, 0xef); 336 _lcd_write_reg(0x50, 0)
313 lcd_write_reg(0x52, 0); 337 _lcd_write_reg(0x51, 0xef)
314 lcd_write_reg(0x53, 0x13f); 338 _lcd_write_reg(0x52, 0)
315 lcd_write_reg(0x60, 0xa700); 339 _lcd_write_reg(0x53, 0x13f)
316 lcd_write_reg(0x61, 1); 340 _lcd_write_reg(0x60, 0xa700)
317 lcd_write_reg(0x6a, 1); 341 _lcd_write_reg(0x61, 1)
318 lcd_write_reg(0x2b, 0xd); 342 _lcd_write_reg(0x6a, 1)
319 mdelay(50); 343 _lcd_write_reg(0x2b, 0xd)
320 lcd_write_reg(0x90, 0x11); 344 _mdelay(50)
321 lcd_write_reg(0x92, 0x600); 345 _lcd_write_reg(0x90, 0x11)
322 lcd_write_reg(0x93, 3); 346 _lcd_write_reg(0x92, 0x600)
323 lcd_write_reg(0x95, 0x110); 347 _lcd_write_reg(0x93, 3)
324 lcd_write_reg(0x97, 0); 348 _lcd_write_reg(0x95, 0x110)
325 lcd_write_reg(0x98, 0); 349 _lcd_write_reg(0x97, 0)
326 lcd_write_reg(7, 0x173); 350 _lcd_write_reg(0x98, 0)
327 lcd_write_reg(0x22, 0); 351 _lcd_write_reg(7, 0x173)
352 _lcd_write_reg(0x22, 0)
353 _end_seq()
328} 354}
329 355
330void lcd_init_device(void) 356void lcd_init_device(void)
331{ 357{
332 setup_lcdif(); 358 setup_lcdif();
333 setup_lcdif_clock(); 359 setup_lcdif_clock();
334 360
335 for(int i = 0; i < 10; i++) 361 for(int i = 0; i < 10; i++)
336 { 362 {
337 uint32_t kind = lcd_read_reg(0); 363 lcd_kind = lcd_read_reg(0);
338 if(kind == LCD_KIND_7783 || kind == LCD_KIND_9325) 364 if(lcd_kind == LCD_KIND_7783 || lcd_kind == LCD_KIND_9325)
339 {
340 lcd_kind = kind;
341 break; 365 break;
342 }
343 else
344 {
345 lcd_kind = LCD_KIND_OTHER;
346 }
347 } 366 }
348 mdelay(5); 367 mdelay(5);
349 switch(lcd_kind) 368 switch(lcd_kind)
@@ -351,6 +370,7 @@ void lcd_init_device(void)
351 case LCD_KIND_7783: lcd_init_seq_7783(); break; 370 case LCD_KIND_7783: lcd_init_seq_7783(); break;
352 case LCD_KIND_9325: lcd_init_seq_9325(); break; 371 case LCD_KIND_9325: lcd_init_seq_9325(); break;
353 default: 372 default:
373 lcd_kind = LCD_KIND_9325;
354 lcd_init_seq_7783(); break; 374 lcd_init_seq_7783(); break;
355 } 375 }
356} 376}
@@ -360,30 +380,34 @@ static void lcd_enable_7783(bool enable)
360{ 380{
361 if(!enable) 381 if(!enable)
362 { 382 {
363 lcd_write_reg(7, 0x131); 383 _begin_seq()
364 mdelay(50); 384 _lcd_write_reg(7, 0x131)
365 lcd_write_reg(7, 0x20); 385 _mdelay(50)
366 mdelay(50); 386 _lcd_write_reg(7, 0x20)
367 lcd_write_reg(0x10, 0x82); 387 _mdelay(50)
368 mdelay(50); 388 _lcd_write_reg(0x10, 0x82)
389 _mdelay(50)
390 _end_seq()
369 } 391 }
370 else 392 else
371 { 393 {
372 lcd_write_reg(0x11, 5); 394 _begin_seq()
373 lcd_write_reg(0x10, 0x12b0); 395 _lcd_write_reg(0x11, 5)
374 mdelay(50); 396 _lcd_write_reg(0x10, 0x12b0)
375 lcd_write_reg(7, 0x11); 397 _mdelay(50)
376 mdelay(50); 398 _lcd_write_reg(7, 0x11)
377 lcd_write_reg(0x12, 0x89); 399 _mdelay(50)
378 mdelay(50); 400 _lcd_write_reg(0x12, 0x89)
379 lcd_write_reg(0x13, 0x1d00); 401 _mdelay(50)
380 mdelay(50); 402 _lcd_write_reg(0x13, 0x1d00)
381 lcd_write_reg(0x29, 0x2f); 403 _mdelay(50)
382 mdelay(50); 404 _lcd_write_reg(0x29, 0x2f)
383 lcd_write_reg(0x2b, 0xa); 405 _mdelay(50)
384 lcd_write_reg(7, 0x133); 406 _lcd_write_reg(0x2b, 0xa)
385 mdelay(50); 407 _lcd_write_reg(7, 0x133)
386 lcd_write_reg(0x22, 0); 408 _mdelay(50)
409 _lcd_write_reg(0x22, 0)
410 _end_seq()
387 } 411 }
388} 412}
389 413
@@ -391,36 +415,40 @@ static void lcd_enable_9325(bool enable)
391{ 415{
392 if(!enable) 416 if(!enable)
393 { 417 {
394 lcd_write_reg(7, 0x131); 418 _begin_seq()
395 mdelay(10); 419 _lcd_write_reg(7, 0x131)
396 lcd_write_reg(7, 0x130); 420 _mdelay(10)
397 mdelay(10); 421 _lcd_write_reg(7, 0x130)
398 lcd_write_reg(7, 0); 422 _mdelay(10)
399 lcd_write_reg(0x10, 0x80); 423 _lcd_write_reg(7, 0)
400 lcd_write_reg(0x11, 0); 424 _lcd_write_reg(0x10, 0x80)
401 lcd_write_reg(0x12, 0); 425 _lcd_write_reg(0x11, 0)
402 lcd_write_reg(0x13, 0); 426 _lcd_write_reg(0x12, 0)
403 mdelay(200); 427 _lcd_write_reg(0x13, 0)
404 lcd_write_reg(0x10, 0x82); 428 _mdelay(200)
429 _lcd_write_reg(0x10, 0x82)
430 _end_seq()
405 } 431 }
406 else 432 else
407 { 433 {
408 lcd_write_reg(0x10, 0x80); 434 _begin_seq()
409 lcd_write_reg(0x11, 0); 435 _lcd_write_reg(0x10, 0x80)
410 lcd_write_reg(0x12, 0); 436 _lcd_write_reg(0x11, 0)
411 lcd_write_reg(0x13, 0); 437 _lcd_write_reg(0x12, 0)
412 lcd_write_reg(7, 1); 438 _lcd_write_reg(0x13, 0)
413 mdelay(200); 439 _lcd_write_reg(7, 1)
414 lcd_write_reg(0x10, 0x1290); 440 _mdelay(200)
415 lcd_write_reg(0x11, 7); 441 _lcd_write_reg(0x10, 0x1290)
416 mdelay(50); 442 _lcd_write_reg(0x11, 7)
417 lcd_write_reg(0x12, 0x19); 443 _mdelay(50)
418 mdelay(50); 444 _lcd_write_reg(0x12, 0x19)
419 lcd_write_reg(0x13, 0x1700); 445 _mdelay(50)
420 lcd_write_reg(0x29, 0x10); 446 _lcd_write_reg(0x13, 0x1700)
421 mdelay(50); 447 _lcd_write_reg(0x29, 0x10)
422 lcd_write_reg(7, 0x133); 448 _mdelay(50)
423 lcd_write_reg(0x22, 0); 449 _lcd_write_reg(7, 0x133)
450 _lcd_write_reg(0x22, 0)
451 _end_seq()
424 } 452 }
425} 453}
426 454
diff --git a/firmware/target/arm/imx233/ssp-imx233.c b/firmware/target/arm/imx233/ssp-imx233.c
index ef137fcfbf..59405bbdc2 100644
--- a/firmware/target/arm/imx233/ssp-imx233.c
+++ b/firmware/target/arm/imx233/ssp-imx233.c
@@ -258,6 +258,7 @@ enum imx233_ssp_error_t imx233_ssp_sd_mmc_transfer(int ssp, uint8_t cmd,
258 (3 << HW_APB_CHx_CMD__CMDWORDS_BP) | 258 (3 << HW_APB_CHx_CMD__CMDWORDS_BP) |
259 (xfer_size << HW_APB_CHx_CMD__XFER_COUNT_BP); 259 (xfer_size << HW_APB_CHx_CMD__XFER_COUNT_BP);
260 260
261 __REG_CLR(HW_SSP_CTRL1(ssp)) = HW_SSP_CTRL1__ALL_IRQ;
261 imx233_dma_reset_channel(APB_SSP(ssp)); 262 imx233_dma_reset_channel(APB_SSP(ssp));
262 imx233_dma_start_command(APB_SSP(ssp), &ssp_dma_cmd[ssp - 1].dma); 263 imx233_dma_start_command(APB_SSP(ssp), &ssp_dma_cmd[ssp - 1].dma);
263 264
@@ -266,7 +267,10 @@ enum imx233_ssp_error_t imx233_ssp_sd_mmc_transfer(int ssp, uint8_t cmd,
266 enum imx233_ssp_error_t ret; 267 enum imx233_ssp_error_t ret;
267 268
268 if(semaphore_wait(&ssp_sema[ssp - 1], HZ) == OBJ_WAIT_TIMEDOUT) 269 if(semaphore_wait(&ssp_sema[ssp - 1], HZ) == OBJ_WAIT_TIMEDOUT)
270 {
271 imx233_dma_reset_channel(APB_SSP(ssp));
269 ret = SSP_TIMEOUT; 272 ret = SSP_TIMEOUT;
273 }
270 else if((HW_SSP_CTRL1(ssp) & HW_SSP_CTRL1__ALL_IRQ) == 0) 274 else if((HW_SSP_CTRL1(ssp) & HW_SSP_CTRL1__ALL_IRQ) == 0)
271 ret = SSP_SUCCESS; 275 ret = SSP_SUCCESS;
272 else if(HW_SSP_CTRL1(ssp) & (HW_SSP_CTRL1__RESP_TIMEOUT_IRQ | 276 else if(HW_SSP_CTRL1(ssp) & (HW_SSP_CTRL1__RESP_TIMEOUT_IRQ |
diff --git a/firmware/target/arm/imx233/system-imx233.c b/firmware/target/arm/imx233/system-imx233.c
index 6114ecca08..ab95c453da 100644
--- a/firmware/target/arm/imx233/system-imx233.c
+++ b/firmware/target/arm/imx233/system-imx233.c
@@ -29,6 +29,7 @@
29#include "timrot-imx233.h" 29#include "timrot-imx233.h"
30#include "dma-imx233.h" 30#include "dma-imx233.h"
31#include "ssp-imx233.h" 31#include "ssp-imx233.h"
32#include "i2c-imx233.h"
32#include "lcd.h" 33#include "lcd.h"
33#include "backlight-target.h" 34#include "backlight-target.h"
34#include "button-target.h" 35#include "button-target.h"
@@ -51,6 +52,8 @@ default_interrupt(INT_SSP1_DMA);
51default_interrupt(INT_SSP1_ERROR); 52default_interrupt(INT_SSP1_ERROR);
52default_interrupt(INT_SSP2_DMA); 53default_interrupt(INT_SSP2_DMA);
53default_interrupt(INT_SSP2_ERROR); 54default_interrupt(INT_SSP2_ERROR);
55default_interrupt(INT_I2C_DMA);
56default_interrupt(INT_I2C_ERROR);
54 57
55typedef void (*isr_t)(void); 58typedef void (*isr_t)(void);
56 59
@@ -66,7 +69,9 @@ static isr_t isr_table[INT_SRC_NR_SOURCES] =
66 [INT_SRC_SSP1_DMA] = INT_SSP1_DMA, 69 [INT_SRC_SSP1_DMA] = INT_SSP1_DMA,
67 [INT_SRC_SSP1_ERROR] = INT_SSP1_ERROR, 70 [INT_SRC_SSP1_ERROR] = INT_SSP1_ERROR,
68 [INT_SRC_SSP2_DMA] = INT_SSP2_DMA, 71 [INT_SRC_SSP2_DMA] = INT_SSP2_DMA,
69 [INT_SRC_SSP2_ERROR] = INT_SSP2_ERROR 72 [INT_SRC_SSP2_ERROR] = INT_SSP2_ERROR,
73 [INT_SRC_I2C_DMA] = INT_I2C_DMA,
74 [INT_SRC_I2C_ERROR] = INT_I2C_ERROR,
70}; 75};
71 76
72static void UIRQ(void) 77static void UIRQ(void)
@@ -147,6 +152,9 @@ void system_init(void)
147 imx233_timrot_init(); 152 imx233_timrot_init();
148 imx233_dma_init(); 153 imx233_dma_init();
149 imx233_ssp_init(); 154 imx233_ssp_init();
155 #ifndef BOOTLOADER
156 imx233_i2c_init();
157 #endif
150} 158}
151 159
152void power_off(void) 160void power_off(void)
diff --git a/firmware/target/arm/imx233/system-target.h b/firmware/target/arm/imx233/system-target.h
index 0f7bde4896..c5c2ed8f0c 100644
--- a/firmware/target/arm/imx233/system-target.h
+++ b/firmware/target/arm/imx233/system-target.h
@@ -87,6 +87,8 @@
87#define INT_SRC_SSP1_DMA 14 87#define INT_SRC_SSP1_DMA 14
88#define INT_SRC_SSP1_ERROR 15 88#define INT_SRC_SSP1_ERROR 15
89#define INT_SRC_SSP2_DMA 20 89#define INT_SRC_SSP2_DMA 20
90#define INT_SRC_I2C_DMA 26
91#define INT_SRC_I2C_ERROR 27
90#define INT_SRC_TIMER(nr) (28 + (nr)) 92#define INT_SRC_TIMER(nr) (28 + (nr))
91#define INT_SRC_LCDIF_DMA 45 93#define INT_SRC_LCDIF_DMA 45
92#define INT_SRC_LCDIF_ERROR 46 94#define INT_SRC_LCDIF_ERROR 46