Clipv2: fix grey lcd output

We can write to DBOP_DOUT in 8 bits mode : bits 7..0 are mapped to the
LCD, not bits 15..12 and 3..0 like on Clipv1

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25455 a1c6a512-1295-4272-9138-f99709370657

4 files changed, 110 insertions, 5 deletions

diff --git a/firmware/SOURCES b/firmware/SOURCES
index b5151c3950..e4bdca258e 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -1227,7 +1227,7 @@ target/arm/as3525/sansa-clip/powermgmt-clip.c
 #ifndef SIMULATOR
 target/arm/as3525/lcd-ssd1303.c
 target/arm/as3525/sansa-clipv2/lcd-clipv2.c
-target/arm/as3525/sansa-clip/lcd-as-clip.S  /* TODO for clipv2 */
+target/arm/as3525/sansa-clipv2/lcd-as-clipv2.S
 target/arm/as3525/sansa-clipv2/button-clip.c
 target/arm/as3525/sansa-clipv2/backlight-clipv2.c
 #ifndef BOOTLOADER
diff --git a/firmware/export/as3525.h b/firmware/export/as3525.h
index 3c0c2a3ecf..4a9ab5f40e 100644
--- a/firmware/export/as3525.h
+++ b/firmware/export/as3525.h
@@ -115,6 +115,7 @@
 #define DBOP_CTRL         (*(volatile unsigned long *)(DBOP_BASE + 0x08))
 #define DBOP_STAT         (*(volatile unsigned long *)(DBOP_BASE + 0x0C))
 /* default is 16bit, but we switch to 32bit for some targets for better speed */
+#define DBOP_DOUT8        (*(volatile unsigned  char*)(DBOP_BASE + 0x10))
 #define DBOP_DOUT         (*(volatile unsigned short*)(DBOP_BASE + 0x10))
 #define DBOP_DOUT16       (*(volatile unsigned short*)(DBOP_BASE + 0x10))
 #define DBOP_DOUT32       (*(volatile unsigned long *)(DBOP_BASE + 0x10))
diff --git a/firmware/target/arm/as3525/sansa-clipv2/lcd-as-clipv2.S b/firmware/target/arm/as3525/sansa-clipv2/lcd-as-clipv2.S
new file mode 100644
index 0000000000..4281519491
--- /dev/null
+++ b/firmware/target/arm/as3525/sansa-clipv2/lcd-as-clipv2.S
@@ -0,0 +1,106 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2008 by Jens Arnold
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#include "as3525v2.h"
+
+    .text
+    .align      2
+
+    .global     lcd_grey_data
+    .type       lcd_grey_data,%function
+
+/* A high performance function to write grey phase data to the display,
+ * one or multiple pixels.
+ *
+ * Arguments:
+ *   r0 - pixel value data address
+ *   r1 - pixel phase data address
+ *   r2 - pixel block count
+ *
+ * Register usage:
+ *   r3/r4 - current block of phases
+ *   r5/r6 - current block of values
+ *   r7 - lcd data accumulator
+ *   r12 - phase signs mask
+ *   lr - lcd bridge address
+ */
+
+lcd_grey_data:
+    stmfd   sp!, {r4-r7, lr}
+    mov     r12, #0x80
+    orr     r12, r12, r12, lsl #8
+    orr     r12, r12, r12, lsl #16
+
+    ldr     lr, =GPIOB_BASE
+    mov     r3, #(1<<2)
+    str     r3, [lr, #(4*(1<<2))] @ set pin D/C# of LCD controller (data)
+
+    ldr     lr, =DBOP_BASE
+
+.greyloop:
+    ldmia   r1, {r3-r4}         /* Fetch 8 pixel phases */
+    ldmia   r0!, {r5-r6}        /* Fetch 8 pixel values */
+
+    mov     r7, #0
+
+    /* set bits 7..3 */
+    tst     r3, #0x80
+    orrne   r7, r7, #0x80
+    tst     r3, #0x8000
+    orrne   r7, r7, #0x40
+    tst     r3, #0x800000
+    orrne   r7, r7, #0x20
+    tst     r3, #0x80000000
+    orrne   r7, r7, #0x10
+    bic     r3, r3, r12
+    add     r3, r3, r5
+
+    /* set bits 3..0 */
+    tst     r4, #0x80
+    orrne   r7, r7, #0x08
+    tst     r4, #0x8000
+    orrne   r7, r7, #0x04
+    tst     r4, #0x800000
+    orrne   r7, r7, #0x02
+    tst     r4, #0x80000000
+    orrne   r7, r7, #0x01
+    bic     r4, r4, r12
+    add     r4, r4, r6
+
+    stmia   r1!, {r3-r4}
+
+    strb    r7, [lr, #0x10]     @ DBOP_DOUT
+
+1:
+    ldr     r5, [lr, #0xC]      @ DBOP_STAT
+    ands    r5, r5, #(1<<6)    @ wait until push fifo is full
+    bne     1b
+
+    subs    r2, r2, #1
+    bne     .greyloop
+
+1:
+    ldr     r5, [lr, #0xC]      @ DBOP_STAT
+    ands    r5, r5, #(1<<10)    @ wait until push fifo empties
+    beq     1b
+
+    ldmfd   sp!, {r4-r7, pc}
+    .size   lcd_grey_data,.-lcd_grey_data
diff --git a/firmware/target/arm/as3525/sansa-clipv2/lcd-clipv2.c b/firmware/target/arm/as3525/sansa-clipv2/lcd-clipv2.c
index e405036b63..6a8e09a2de 100644
--- a/firmware/target/arm/as3525/sansa-clipv2/lcd-clipv2.c
+++ b/firmware/target/arm/as3525/sansa-clipv2/lcd-clipv2.c
@@ -51,8 +51,7 @@ void lcd_write_command(int byte)
     DBOP_TIMPOL_23 = 0xE0370036;
 
     /* Write command */
-    /* Only bits 15:12 and 3:0 of DBOP_DOUT are meaningful */
-    DBOP_DOUT = (byte << 8) | byte;
+    DBOP_DOUT8 = byte;
 
     /* While push fifo is not empty */
     while ((DBOP_STAT & (1<<10)) == 0)
@@ -72,8 +71,7 @@ void lcd_write_data(const fb_data* p_bytes, int count)
     while (count--)
     {
         /* Write pixels */
-        /* Only bits 15:12 and 3:0 of DBOP_DOUT are meaningful */
-        DBOP_DOUT = (*p_bytes << 8) | *p_bytes;
+        DBOP_DOUT8 = *p_bytes;
 
         p_bytes++; /* next packed pixels */