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author | Michael Sevakis <jethead71@rockbox.org> | 2006-08-26 21:00:18 +0000 |
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committer | Michael Sevakis <jethead71@rockbox.org> | 2006-08-26 21:00:18 +0000 |
commit | d844cd2a0204ee4db6da0f3e2b185a1b8ee9291e (patch) | |
tree | c6b94f8f9737f4b43cb0e149628dd8aab78e0a93 | |
parent | 890989d016b71ad51df90f7a609eb9ce6bb5a56b (diff) | |
download | rockbox-d844cd2a0204ee4db6da0f3e2b185a1b8ee9291e.tar.gz rockbox-d844cd2a0204ee4db6da0f3e2b185a1b8ee9291e.zip |
Smoother volume control, less clickiness and some misc. formatting changes for tlv320
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@10762 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/drivers/tlv320.c | 82 | ||||
-rw-r--r-- | firmware/export/tlv320.h | 4 |
2 files changed, 43 insertions, 43 deletions
diff --git a/firmware/drivers/tlv320.c b/firmware/drivers/tlv320.c index 39cd2a5536..5027d744c9 100644 --- a/firmware/drivers/tlv320.c +++ b/firmware/drivers/tlv320.c | |||
@@ -51,7 +51,7 @@ void tlv320_write_reg(unsigned reg, unsigned value) | |||
51 | 51 | ||
52 | /* The register address is the high 7 bits and the data the low 9 bits */ | 52 | /* The register address is the high 7 bits and the data the low 9 bits */ |
53 | data[0] = (reg << 1) | ((value >> 8) & 1); | 53 | data[0] = (reg << 1) | ((value >> 8) & 1); |
54 | data[1] = value & 0xff; | 54 | data[1] = value; |
55 | 55 | ||
56 | if (i2c_write(I2C_IFACE_0, TLV320_ADDR, data, 2) != 2) | 56 | if (i2c_write(I2C_IFACE_0, TLV320_ADDR, data, 2) != 2) |
57 | { | 57 | { |
@@ -73,16 +73,18 @@ void tlv320_init(void) | |||
73 | 73 | ||
74 | /* Initialize all registers */ | 74 | /* Initialize all registers */ |
75 | 75 | ||
76 | tlv320_write_reg(REG_PC, PC_ADC|PC_MIC|PC_LINE); /* All ON except ADC, MIC and LINE */ | 76 | /* All ON except OUT, ADC, MIC and LINE */ |
77 | tlv320_write_reg(REG_PC, PC_OUT | PC_ADC | PC_MIC | PC_LINE); | ||
77 | tlv320_set_recvol(0, 0, AUDIO_GAIN_MIC); | 78 | tlv320_set_recvol(0, 0, AUDIO_GAIN_MIC); |
78 | tlv320_set_recvol(0, 0, AUDIO_GAIN_LINEIN); | 79 | tlv320_set_recvol(0, 0, AUDIO_GAIN_LINEIN); |
79 | tlv320_mute(true); | 80 | tlv320_mute(true); |
80 | tlv320_write_reg(REG_AAP, AAP_DAC|AAP_MICM); | 81 | tlv320_write_reg(REG_AAP, AAP_DAC | AAP_MICM); |
81 | tlv320_write_reg(REG_DAP, 0x00); /* No deemphasis */ | 82 | tlv320_write_reg(REG_DAP, 0x00); /* No deemphasis */ |
82 | tlv320_write_reg(REG_DAIF, DAIF_IWL_16|DAIF_FOR_I2S); | 83 | tlv320_write_reg(REG_DAIF, DAIF_IWL_16 | DAIF_FOR_I2S); |
83 | tlv320_set_headphone_vol(0, 0); | ||
84 | tlv320_write_reg(REG_DIA, DIA_ACT); | 84 | tlv320_write_reg(REG_DIA, DIA_ACT); |
85 | tlv320_write_reg(REG_SRC, (1 << 5)); /* 44.1kHz */ | 85 | tlv320_write_reg(REG_SRC, (1 << 5)); /* 44.1kHz */ |
86 | /* All ON except ADC, MIC and LINE */ | ||
87 | tlv320_write_reg(REG_PC, PC_ADC | PC_MIC | PC_LINE); | ||
86 | } | 88 | } |
87 | 89 | ||
88 | /** | 90 | /** |
@@ -94,7 +96,9 @@ void tlv320_reset(void) | |||
94 | } | 96 | } |
95 | 97 | ||
96 | /** | 98 | /** |
97 | * Sets left and right headphone volume (127(max) to 48(muted)) | 99 | * Sets left and right headphone volume |
100 | * | ||
101 | * Left & Right: 48 .. 121 .. 127 => Volume -73dB (mute) .. +0 dB .. +6 dB | ||
98 | */ | 102 | */ |
99 | void tlv320_set_headphone_vol(int vol_l, int vol_r) | 103 | void tlv320_set_headphone_vol(int vol_l, int vol_r) |
100 | { | 104 | { |
@@ -110,15 +114,15 @@ void tlv320_set_headphone_vol(int vol_l, int vol_r) | |||
110 | value_r = RHV_RHV(vol_r); | 114 | value_r = RHV_RHV(vol_r); |
111 | 115 | ||
112 | /* update */ | 116 | /* update */ |
113 | tlv320_write_reg(REG_LHV, value_l); | 117 | tlv320_write_reg(REG_LHV, LHV_LZC | value_l); |
114 | tlv320_write_reg(REG_RHV, value_r); | 118 | tlv320_write_reg(REG_RHV, RHV_RZC | value_r); |
115 | } | 119 | } |
116 | 120 | ||
117 | /** | 121 | /** |
118 | * Set recording volume | 122 | * Set recording volume |
119 | * | 123 | * |
120 | * Line in : 0 .. 31 => Volume -34.5 .. 12 dB | 124 | * Line in : 0 .. 31 => Volume -34.5 .. +12 dB |
121 | * Mic (left): 0 .. 1 => Volume 0 .. 20 dB | 125 | * Mic (left): 0 .. 1 => Volume +0, +20 dB |
122 | * | 126 | * |
123 | */ | 127 | */ |
124 | void tlv320_set_recvol(int left, int right, int type) | 128 | void tlv320_set_recvol(int left, int right, int type) |
@@ -134,7 +138,8 @@ void tlv320_set_recvol(int left, int right, int type) | |||
134 | 138 | ||
135 | tlv320_write_reg(REG_AAP, value_aap); | 139 | tlv320_write_reg(REG_AAP, value_aap); |
136 | 140 | ||
137 | } else if (type == AUDIO_GAIN_LINEIN) | 141 | } |
142 | else if (type == AUDIO_GAIN_LINEIN) | ||
138 | { | 143 | { |
139 | tlv320_write_reg(REG_LLIV, LLIV_LIV(left)); | 144 | tlv320_write_reg(REG_LLIV, LLIV_LIV(left)); |
140 | tlv320_write_reg(REG_RLIV, RLIV_RIV(right)); | 145 | tlv320_write_reg(REG_RLIV, RLIV_RIV(right)); |
@@ -161,14 +166,15 @@ void tlv320_mute(bool mute) | |||
161 | value_r = RHV_RHV(tlv320.vol_r); | 166 | value_r = RHV_RHV(tlv320.vol_r); |
162 | } | 167 | } |
163 | 168 | ||
164 | tlv320_write_reg(REG_LHV, value_l); | 169 | tlv320_write_reg(REG_LHV, LHV_LZC | value_l); |
165 | tlv320_write_reg(REG_RHV, value_r); | 170 | tlv320_write_reg(REG_RHV, RHV_RZC | value_r); |
166 | } | 171 | } |
167 | 172 | ||
168 | /* Nice shutdown of TLV320 codec */ | 173 | /* Nice shutdown of TLV320 codec */ |
169 | void tlv320_close() | 174 | void tlv320_close() |
170 | { | 175 | { |
171 | tlv320_write_reg(REG_PC, 0xFF); /* All OFF */ | 176 | tlv320_write_reg(REG_PC, PC_OFF | PC_CLK | PC_OSC | PC_OUT | |
177 | PC_DAC | PC_ADC | PC_MIC | PC_LINE); /* All OFF */ | ||
172 | } | 178 | } |
173 | 179 | ||
174 | void tlv320_enable_recording(bool source_mic) | 180 | void tlv320_enable_recording(bool source_mic) |
@@ -178,22 +184,19 @@ void tlv320_enable_recording(bool source_mic) | |||
178 | 184 | ||
179 | if (source_mic) | 185 | if (source_mic) |
180 | { | 186 | { |
181 | /* select mic and enable mic boost (20 dB) */ | 187 | /* select MIC and enable mic boost (20 dB) */ |
182 | value_aap = AAP_DAC | AAP_INSEL | AAP_MICB; | 188 | value_aap = AAP_DAC | AAP_INSEL | AAP_MICB; |
183 | value_pc = PC_LINE; /* power down line-in */ | 189 | value_pc = PC_LINE; /* power down LINE */ |
184 | } | 190 | } |
185 | else | 191 | else |
186 | { | 192 | { |
187 | value_aap = AAP_DAC | AAP_MICM; | 193 | value_aap = AAP_DAC | AAP_MICM; |
188 | value_pc = PC_MIC; /* power down mic */ | 194 | value_pc = PC_MIC; /* power down MIC */ |
189 | } | 195 | } |
190 | 196 | ||
191 | tlv320_write_reg(REG_PC, value_pc); | 197 | tlv320_write_reg(REG_PC, value_pc); |
192 | sleep(HZ/8); | ||
193 | |||
194 | tlv320_write_reg(REG_AAP, value_aap); | 198 | tlv320_write_reg(REG_AAP, value_aap); |
195 | sleep(HZ/8); | 199 | |
196 | |||
197 | /* Enable MASTER mode (start sending I2S data to the CPU) */ | 200 | /* Enable MASTER mode (start sending I2S data to the CPU) */ |
198 | value_daif |= DAIF_MS; | 201 | value_daif |= DAIF_MS; |
199 | tlv320_write_reg(REG_DAIF, value_daif); | 202 | tlv320_write_reg(REG_DAIF, value_daif); |
@@ -208,31 +211,28 @@ void tlv320_disable_recording() | |||
208 | value_daif &= ~DAIF_MS; /* disable MASTER mode */ | 211 | value_daif &= ~DAIF_MS; /* disable MASTER mode */ |
209 | tlv320_write_reg(REG_DAIF, value_daif); | 212 | tlv320_write_reg(REG_DAIF, value_daif); |
210 | 213 | ||
211 | value_aap |= AAP_MICM; /* mute mic */ | 214 | value_aap |= AAP_MICM; /* mute MIC */ |
212 | tlv320_write_reg(REG_PC, value_aap); | 215 | tlv320_write_reg(REG_PC, value_aap); |
213 | 216 | ||
214 | value_pc |= (PC_MIC|PC_LINE|PC_ADC); /* power down mic, line-in and adc */ | 217 | value_pc |= PC_ADC | PC_MIC | PC_LINE; /* ADC, MIC and LINE off */ |
215 | tlv320_write_reg(REG_PC, value_pc); | 218 | tlv320_write_reg(REG_PC, value_pc); |
216 | |||
217 | sleep(HZ/8); | ||
218 | } | 219 | } |
219 | 220 | ||
220 | void tlv320_set_monitor(bool enable) | 221 | void tlv320_set_monitor(bool enable) |
221 | { | 222 | { |
222 | unsigned value_aap, value_pc; | 223 | unsigned value_aap, value_pc; |
223 | if (enable) | ||
224 | { | ||
225 | value_aap = AAP_BYPASS | AAP_MICM; | ||
226 | value_pc = (PC_MIC|PC_DAC|PC_ADC); /* power down mic, dac and adc */ | ||
227 | } | ||
228 | else | ||
229 | { | ||
230 | value_aap = AAP_DAC | AAP_MICM; | ||
231 | value_pc = (PC_MIC|PC_LINE|PC_ADC); /* power down mic, line-in and adc */ | ||
232 | } | ||
233 | tlv320_write_reg(REG_AAP, value_aap); | ||
234 | tlv320_write_reg(REG_PC, value_pc); | ||
235 | |||
236 | sleep(HZ/8); | ||
237 | } | ||
238 | 224 | ||
225 | if (enable) | ||
226 | { | ||
227 | value_aap = AAP_BYPASS | AAP_MICM; | ||
228 | value_pc = PC_DAC | PC_ADC | PC_MIC; /* DAC, ADC and MIC off */ | ||
229 | } | ||
230 | else | ||
231 | { | ||
232 | value_aap = AAP_DAC | AAP_MICM; | ||
233 | value_pc = PC_ADC | PC_MIC | PC_LINE; /* ADC, MIC and LINE off */ | ||
234 | } | ||
235 | |||
236 | tlv320_write_reg(REG_AAP, value_aap); | ||
237 | tlv320_write_reg(REG_PC, value_pc); | ||
238 | } | ||
diff --git a/firmware/export/tlv320.h b/firmware/export/tlv320.h index 45ebfee569..dfcbec4373 100644 --- a/firmware/export/tlv320.h +++ b/firmware/export/tlv320.h | |||
@@ -53,7 +53,7 @@ extern void tlv320_set_monitor(bool enable); | |||
53 | /* REG_LHV: Left Channel Headphone Volume Control */ | 53 | /* REG_LHV: Left Channel Headphone Volume Control */ |
54 | #define REG_LHV 0x2 | 54 | #define REG_LHV 0x2 |
55 | #define LHV_LRS (1 << 8) /* simultaneous volume/mute update */ | 55 | #define LHV_LRS (1 << 8) /* simultaneous volume/mute update */ |
56 | #define LHV_LZC (1 << 7) /* Left-channel zero-cross detect */ | 56 | #define LHV_LZC (1 << 7) /* Left-channel zero-cross detect */ |
57 | #define LHV_LHV(x) ((x) & 0x7f)/* Left headphone volume control */ | 57 | #define LHV_LHV(x) ((x) & 0x7f)/* Left headphone volume control */ |
58 | 58 | ||
59 | /* REG_RHV: Right Channel Headphone Volume Control */ | 59 | /* REG_RHV: Right Channel Headphone Volume Control */ |
@@ -80,7 +80,7 @@ extern void tlv320_set_monitor(bool enable); | |||
80 | 80 | ||
81 | /* REG_PC: Power Down Control */ | 81 | /* REG_PC: Power Down Control */ |
82 | #define REG_PC 0x6 | 82 | #define REG_PC 0x6 |
83 | #define PC_ON (1 << 7) /* Device power */ | 83 | #define PC_OFF (1 << 7) /* Device power */ |
84 | #define PC_CLK (1 << 6) /* Clock */ | 84 | #define PC_CLK (1 << 6) /* Clock */ |
85 | #define PC_OSC (1 << 5) /* Oscillator */ | 85 | #define PC_OSC (1 << 5) /* Oscillator */ |
86 | #define PC_OUT (1 << 4) /* Outputs */ | 86 | #define PC_OUT (1 << 4) /* Outputs */ |