diff options
author | Michael Sevakis <jethead71@rockbox.org> | 2010-05-07 10:53:19 +0000 |
---|---|---|
committer | Michael Sevakis <jethead71@rockbox.org> | 2010-05-07 10:53:19 +0000 |
commit | d7ef2474120f2a009af139754f6d387c8e83c949 (patch) | |
tree | 7b63172498900d1c63c238fd256e532b23dd411e | |
parent | 235fc05e3be7508c310cfd2ff5151d30b78be971 (diff) | |
download | rockbox-d7ef2474120f2a009af139754f6d387c8e83c949.tar.gz rockbox-d7ef2474120f2a009af139754f6d387c8e83c949.zip |
i.MX31/Gigabeat S minor cleaning: Make HW access more obvious in places I forgot to do earlier. Reduce the number of structs that need to be filled-out for some drivers just to simplify a little. Change some types.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25870 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/gpio-gigabeat-s.c | 10 | ||||
-rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/gpio-target.h | 3 | ||||
-rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/mc13783-gigabeat-s.c | 8 | ||||
-rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/mc13783-target.h | 1 | ||||
-rw-r--r-- | firmware/target/arm/imx31/gpio-imx31.c | 125 | ||||
-rw-r--r-- | firmware/target/arm/imx31/gpio-imx31.h | 55 | ||||
-rw-r--r-- | firmware/target/arm/imx31/mc13783-imx31.c | 13 |
7 files changed, 92 insertions, 123 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/gpio-gigabeat-s.c b/firmware/target/arm/imx31/gigabeat-s/gpio-gigabeat-s.c index 3d0ff977da..f4402d5617 100644 --- a/firmware/target/arm/imx31/gigabeat-s/gpio-gigabeat-s.c +++ b/firmware/target/arm/imx31/gigabeat-s/gpio-gigabeat-s.c | |||
@@ -28,7 +28,7 @@ | |||
28 | /* Gigabeat S definitions for static GPIO event registration */ | 28 | /* Gigabeat S definitions for static GPIO event registration */ |
29 | 29 | ||
30 | /* Describes single events for each GPIO1 pin */ | 30 | /* Describes single events for each GPIO1 pin */ |
31 | static const struct gpio_event gpio1_events[] = | 31 | const struct gpio_event gpio1_events[] = |
32 | { | 32 | { |
33 | /* mc13783 keeps the PRIINT high (no low pulse) if other unmasked | 33 | /* mc13783 keeps the PRIINT high (no low pulse) if other unmasked |
34 | * interrupts become active when clearing them or if a source being | 34 | * interrupts become active when clearing them or if a source being |
@@ -41,11 +41,3 @@ static const struct gpio_event gpio1_events[] = | |||
41 | .callback = mc13783_event, | 41 | .callback = mc13783_event, |
42 | } | 42 | } |
43 | }; | 43 | }; |
44 | |||
45 | /* Describes the events attached to GPIO1 port */ | ||
46 | const struct gpio_event_list gpio1_event_list = | ||
47 | { | ||
48 | .ints_priority = INT_PRIO_DEFAULT, | ||
49 | .count = ARRAYLEN(gpio1_events), | ||
50 | .events = gpio1_events, | ||
51 | }; | ||
diff --git a/firmware/target/arm/imx31/gigabeat-s/gpio-target.h b/firmware/target/arm/imx31/gigabeat-s/gpio-target.h index 0c213611ff..2eea27c3be 100644 --- a/firmware/target/arm/imx31/gigabeat-s/gpio-target.h +++ b/firmware/target/arm/imx31/gigabeat-s/gpio-target.h | |||
@@ -29,11 +29,14 @@ | |||
29 | #define MC13783_GPIO_ISR GPIO1_ISR | 29 | #define MC13783_GPIO_ISR GPIO1_ISR |
30 | #define MC13783_GPIO_LINE 31 | 30 | #define MC13783_GPIO_LINE 31 |
31 | 31 | ||
32 | #define GPIO1_INT_PRIO INT_PRIO_DEFAULT | ||
33 | |||
32 | /* Declare event indexes in priority order in a packed array */ | 34 | /* Declare event indexes in priority order in a packed array */ |
33 | enum gpio_event_ids | 35 | enum gpio_event_ids |
34 | { | 36 | { |
35 | /* GPIO1 event IDs */ | 37 | /* GPIO1 event IDs */ |
36 | MC13783_EVENT_ID = GPIO1_EVENT_FIRST, | 38 | MC13783_EVENT_ID = GPIO1_EVENT_FIRST, |
39 | GPIO1_NUM_EVENTS = 1, | ||
37 | /* GPIO2 event IDs */ | 40 | /* GPIO2 event IDs */ |
38 | /* none defined */ | 41 | /* none defined */ |
39 | /* GPIO3 event IDs */ | 42 | /* GPIO3 event IDs */ |
diff --git a/firmware/target/arm/imx31/gigabeat-s/mc13783-gigabeat-s.c b/firmware/target/arm/imx31/gigabeat-s/mc13783-gigabeat-s.c index 22c9f3e1df..e0745a5b8b 100644 --- a/firmware/target/arm/imx31/gigabeat-s/mc13783-gigabeat-s.c +++ b/firmware/target/arm/imx31/gigabeat-s/mc13783-gigabeat-s.c | |||
@@ -52,7 +52,7 @@ struct spi_node mc13783_spi = | |||
52 | 52 | ||
53 | /* Gigabeat S definitions for static MC13783 event registration */ | 53 | /* Gigabeat S definitions for static MC13783 event registration */ |
54 | 54 | ||
55 | static const struct mc13783_event mc13783_events[] = | 55 | const struct mc13783_event mc13783_events[MC13783_NUM_EVENTS] = |
56 | { | 56 | { |
57 | [MC13783_ADCDONE_EVENT] = /* ADC conversion complete */ | 57 | [MC13783_ADCDONE_EVENT] = /* ADC conversion complete */ |
58 | { | 58 | { |
@@ -87,9 +87,3 @@ static const struct mc13783_event mc13783_events[] = | |||
87 | }, | 87 | }, |
88 | #endif | 88 | #endif |
89 | }; | 89 | }; |
90 | |||
91 | const struct mc13783_event_list mc13783_event_list = | ||
92 | { | ||
93 | .count = ARRAYLEN(mc13783_events), | ||
94 | .events = mc13783_events | ||
95 | }; | ||
diff --git a/firmware/target/arm/imx31/gigabeat-s/mc13783-target.h b/firmware/target/arm/imx31/gigabeat-s/mc13783-target.h index 2ae3be1819..48d634035a 100644 --- a/firmware/target/arm/imx31/gigabeat-s/mc13783-target.h +++ b/firmware/target/arm/imx31/gigabeat-s/mc13783-target.h | |||
@@ -33,6 +33,7 @@ enum mc13783_event_ids | |||
33 | #endif | 33 | #endif |
34 | MC13783_SE1_EVENT, /* Main charger detection */ | 34 | MC13783_SE1_EVENT, /* Main charger detection */ |
35 | MC13783_USB_EVENT, /* USB insertion */ | 35 | MC13783_USB_EVENT, /* USB insertion */ |
36 | MC13783_NUM_EVENTS, | ||
36 | }; | 37 | }; |
37 | 38 | ||
38 | #endif /* MC13783_TARGET_H */ | 39 | #endif /* MC13783_TARGET_H */ |
diff --git a/firmware/target/arm/imx31/gpio-imx31.c b/firmware/target/arm/imx31/gpio-imx31.c index 944f70eae3..42d0a42188 100644 --- a/firmware/target/arm/imx31/gpio-imx31.c +++ b/firmware/target/arm/imx31/gpio-imx31.c | |||
@@ -31,67 +31,85 @@ extern void UIE_VECTOR(void); | |||
31 | /* Event lists are allocated for the specific target */ | 31 | /* Event lists are allocated for the specific target */ |
32 | #if (GPIO_EVENT_MASK & USE_GPIO1_EVENTS) | 32 | #if (GPIO_EVENT_MASK & USE_GPIO1_EVENTS) |
33 | static __attribute__((interrupt("IRQ"))) void GPIO1_HANDLER(void); | 33 | static __attribute__((interrupt("IRQ"))) void GPIO1_HANDLER(void); |
34 | extern const struct gpio_event_list gpio1_event_list; | 34 | extern const struct gpio_event gpio1_events[GPIO1_NUM_EVENTS]; |
35 | #endif | 35 | #endif |
36 | 36 | ||
37 | #if (GPIO_EVENT_MASK & USE_GPIO2_EVENTS) | 37 | #if (GPIO_EVENT_MASK & USE_GPIO2_EVENTS) |
38 | static __attribute__((interrupt("IRQ"))) void GPIO2_HANDLER(void); | 38 | static __attribute__((interrupt("IRQ"))) void GPIO2_HANDLER(void); |
39 | extern const struct gpio_event_list gpio2_event_list; | 39 | extern const struct gpio_event gpio2_events[GPIO2_NUM_EVENTS]; |
40 | #endif | 40 | #endif |
41 | 41 | ||
42 | #if (GPIO_EVENT_MASK & USE_GPIO3_EVENTS) | 42 | #if (GPIO_EVENT_MASK & USE_GPIO3_EVENTS) |
43 | static __attribute__((interrupt("IRQ"))) void GPIO3_HANDLER(void); | 43 | static __attribute__((interrupt("IRQ"))) void GPIO3_HANDLER(void); |
44 | extern const struct gpio_event_list gpio3_event_list; | 44 | extern const struct gpio_event gpio3_events[GPIO3_NUM_EVENTS]; |
45 | #endif | 45 | #endif |
46 | 46 | ||
47 | static struct gpio_module_descriptor | 47 | #define DR (0x00 / sizeof (unsigned long)) /* 00h */ |
48 | #define GDIR (0x04 / sizeof (unsigned long)) /* 04h */ | ||
49 | #define PSR (0x08 / sizeof (unsigned long)) /* 08h */ | ||
50 | #define ICR (0x0C / sizeof (unsigned long)) /* 0Ch ICR1,2 */ | ||
51 | #define IMR (0x14 / sizeof (unsigned long)) /* 14h */ | ||
52 | #define ISR (0x18 / sizeof (unsigned long)) | ||
53 | |||
54 | static const struct gpio_module_desc | ||
48 | { | 55 | { |
49 | struct gpio_map * const base; /* Module base address */ | 56 | volatile unsigned long * const base; /* Module base address */ |
50 | enum IMX31_INT_LIST ints; /* AVIC int number */ | 57 | void (* const handler)(void); /* Interrupt function */ |
51 | void (*handler)(void); /* Interrupt function */ | 58 | const struct gpio_event * const events; /* Event handler list */ |
52 | const struct gpio_event_list *list; /* Event handler list */ | 59 | const uint8_t ints; /* AVIC int number */ |
60 | const uint8_t int_priority; /* AVIC int priority */ | ||
61 | const uint8_t count; /* Number of events */ | ||
53 | } gpio_descs[GPIO_NUM_GPIO] = | 62 | } gpio_descs[GPIO_NUM_GPIO] = |
54 | { | 63 | { |
55 | #if (GPIO_EVENT_MASK & USE_GPIO1_EVENTS) | 64 | #if (GPIO_EVENT_MASK & USE_GPIO1_EVENTS) |
56 | { | 65 | { |
57 | .base = (struct gpio_map *)GPIO1_BASE_ADDR, | 66 | .base = (unsigned long *)GPIO1_BASE_ADDR, |
58 | .ints = INT_GPIO1, | 67 | .ints = INT_GPIO1, |
59 | .handler = GPIO1_HANDLER, | 68 | .handler = GPIO1_HANDLER, |
69 | .events = gpio1_events, | ||
70 | .count = GPIO1_NUM_EVENTS, | ||
71 | .int_priority = GPIO1_INT_PRIO | ||
60 | }, | 72 | }, |
61 | #endif | 73 | #endif |
62 | #if (GPIO_EVENT_MASK & USE_GPIO2_EVENTS) | 74 | #if (GPIO_EVENT_MASK & USE_GPIO2_EVENTS) |
63 | { | 75 | { |
64 | .base = (struct gpio_map *)GPIO2_BASE_ADDR, | 76 | .base = (unsigned long *)GPIO2_BASE_ADDR, |
65 | .ints = INT_GPIO2, | 77 | .ints = INT_GPIO2, |
66 | .handler = GPIO2_HANDLER, | 78 | .handler = GPIO2_HANDLER, |
79 | .events = gpio2_events, | ||
80 | .count = GPIO2_NUM_EVENTS, | ||
81 | .int_priority = GPIO2_INT_PRIO | ||
67 | }, | 82 | }, |
68 | #endif | 83 | #endif |
69 | #if (GPIO_EVENT_MASK & USE_GPIO3_EVENTS) | 84 | #if (GPIO_EVENT_MASK & USE_GPIO3_EVENTS) |
70 | { | 85 | { |
71 | .base = (struct gpio_map *)GPIO3_BASE_ADDR, | 86 | .base = (unsigned long *)GPIO3_BASE_ADDR, |
72 | .ints = INT_GPIO3, | 87 | .ints = INT_GPIO3, |
73 | .handler = GPIO3_HANDLER, | 88 | .handler = GPIO3_HANDLER, |
89 | .events = gpio3_events, | ||
90 | .count = GPIO3_NUM_EVENTS, | ||
91 | .int_priority = GPIO3_INT_PRIO, | ||
74 | }, | 92 | }, |
75 | #endif | 93 | #endif |
76 | }; | 94 | }; |
77 | 95 | ||
78 | static void gpio_call_events(const struct gpio_module_descriptor * const desc) | 96 | static void gpio_call_events(enum gpio_module_number gpio) |
79 | { | 97 | { |
80 | const struct gpio_event_list * const list = desc->list; | 98 | const struct gpio_module_desc * const desc = &gpio_descs[gpio]; |
81 | struct gpio_map * const base = desc->base; | 99 | volatile unsigned long * const base = desc->base; |
82 | const struct gpio_event * event, *event_last; | 100 | const struct gpio_event * event, *event_last; |
83 | 101 | ||
84 | /* Intersect pending and unmasked bits */ | 102 | event = desc->events; |
85 | uint32_t pnd = base->isr & base->imr; | 103 | event_last = event + desc->count; |
86 | 104 | ||
87 | event = list->events; | 105 | /* Intersect pending and unmasked bits */ |
88 | event_last = event + list->count; | 106 | unsigned long pnd = base[ISR] & base[IMR]; |
89 | 107 | ||
90 | /* Call each event handler in order */ | 108 | /* Call each event handler in order */ |
91 | /* .count is surely expected to be > 0 */ | 109 | /* .count is surely expected to be > 0 */ |
92 | do | 110 | do |
93 | { | 111 | { |
94 | uint32_t mask = event->mask; | 112 | unsigned long mask = event->mask; |
95 | 113 | ||
96 | if (pnd & mask) | 114 | if (pnd & mask) |
97 | { | 115 | { |
@@ -114,74 +132,63 @@ static void gpio_call_events(const struct gpio_module_descriptor * const desc) | |||
114 | #if (GPIO_EVENT_MASK & USE_GPIO1_EVENTS) | 132 | #if (GPIO_EVENT_MASK & USE_GPIO1_EVENTS) |
115 | static __attribute__((interrupt("IRQ"))) void GPIO1_HANDLER(void) | 133 | static __attribute__((interrupt("IRQ"))) void GPIO1_HANDLER(void) |
116 | { | 134 | { |
117 | gpio_call_events(&gpio_descs[GPIO1_NUM]); | 135 | gpio_call_events(GPIO1_NUM); |
118 | } | 136 | } |
119 | #endif | 137 | #endif |
120 | 138 | ||
121 | #if (GPIO_EVENT_MASK & USE_GPIO2_EVENTS) | 139 | #if (GPIO_EVENT_MASK & USE_GPIO2_EVENTS) |
122 | static __attribute__((interrupt("IRQ"))) void GPIO2_HANDLER(void) | 140 | static __attribute__((interrupt("IRQ"))) void GPIO2_HANDLER(void) |
123 | { | 141 | { |
124 | gpio_call_events(&gpio_descs[GPIO2_NUM]); | 142 | gpio_call_events(GPIO2_NUM); |
125 | } | 143 | } |
126 | #endif | 144 | #endif |
127 | 145 | ||
128 | #if (GPIO_EVENT_MASK & USE_GPIO3_EVENTS) | 146 | #if (GPIO_EVENT_MASK & USE_GPIO3_EVENTS) |
129 | static __attribute__((interrupt("IRQ"))) void GPIO3_HANDLER(void) | 147 | static __attribute__((interrupt("IRQ"))) void GPIO3_HANDLER(void) |
130 | { | 148 | { |
131 | gpio_call_events(&gpio_descs[GPIO3_NUM]); | 149 | gpio_call_events(GPIO3_NUM); |
132 | } | 150 | } |
133 | #endif | 151 | #endif |
134 | 152 | ||
135 | void gpio_init(void) | 153 | void gpio_init(void) |
136 | { | 154 | { |
137 | /* Mask-out GPIO interrupts - enable what's wanted later */ | 155 | /* Mask-out GPIO interrupts - enable what's wanted later */ |
138 | GPIO1_IMR = 0; | 156 | int i; |
139 | GPIO2_IMR = 0; | 157 | for (i = 0; i < GPIO_NUM_GPIO; i++) |
140 | GPIO3_IMR = 0; | 158 | gpio_descs[i].base[IMR] = 0; |
141 | |||
142 | /* Init the externally-defined event lists for each port */ | ||
143 | #if (GPIO_EVENT_MASK & USE_GPIO1_EVENTS) | ||
144 | gpio_descs[GPIO1_NUM].list = &gpio1_event_list; | ||
145 | #endif | ||
146 | #if (GPIO_EVENT_MASK & USE_GPIO2_EVENTS) | ||
147 | gpio_descs[GPIO2_NUM].list = &gpio2_event_list; | ||
148 | #endif | ||
149 | #if (GPIO_EVENT_MASK & USE_GPIO3_EVENTS) | ||
150 | gpio_descs[GPIO3_NUM].list = &gpio3_event_list; | ||
151 | #endif | ||
152 | } | 159 | } |
153 | 160 | ||
154 | bool gpio_enable_event(enum gpio_event_ids id) | 161 | bool gpio_enable_event(enum gpio_event_ids id) |
155 | { | 162 | { |
156 | const struct gpio_module_descriptor * const desc = &gpio_descs[id >> 5]; | 163 | const struct gpio_module_desc * const desc = &gpio_descs[id >> 5]; |
157 | const struct gpio_event * const event = &desc->list->events[id & 31]; | 164 | const struct gpio_event * const event = &desc->events[id & 31]; |
158 | struct gpio_map * const base = desc->base; | 165 | volatile unsigned long * const base = desc->base; |
159 | volatile uint32_t *icr; | 166 | volatile unsigned long *icr; |
160 | uint32_t mask, line; | 167 | unsigned long mask, line; |
161 | uint32_t imr; | 168 | unsigned long imr; |
162 | int shift; | 169 | int shift; |
163 | 170 | ||
164 | int oldlevel = disable_irq_save(); | 171 | int oldlevel = disable_irq_save(); |
165 | 172 | ||
166 | imr = base->imr; | 173 | imr = base[IMR]; |
167 | 174 | ||
168 | if (imr == 0) | 175 | if (imr == 0) |
169 | { | 176 | { |
170 | /* First enabled interrupt for this GPIO */ | 177 | /* First enabled interrupt for this GPIO */ |
171 | avic_enable_int(desc->ints, INT_TYPE_IRQ, desc->list->ints_priority, | 178 | avic_enable_int(desc->ints, INT_TYPE_IRQ, desc->int_priority, |
172 | desc->handler); | 179 | desc->handler); |
173 | } | 180 | } |
174 | 181 | ||
175 | /* Set the line sense */ | 182 | /* Set the line sense */ |
176 | line = find_first_set_bit(event->mask); | 183 | line = find_first_set_bit(event->mask); |
177 | icr = &base->icr[line >> 4]; | 184 | icr = &base[ICR + (line >> 4)]; |
178 | shift = (line & 15) << 1; | 185 | shift = 2*(line & 15); |
179 | mask = GPIO_SENSE_CONFIG_MASK << shift; | 186 | mask = GPIO_SENSE_CONFIG_MASK << shift; |
180 | 187 | ||
181 | *icr = (*icr & ~mask) | ((event->sense << shift) & mask); | 188 | *icr = (*icr & ~mask) | ((event->sense << shift) & mask); |
182 | 189 | ||
183 | /* Unmask the line */ | 190 | /* Unmask the line */ |
184 | base->imr = imr | event->mask; | 191 | base[IMR] = imr | event->mask; |
185 | 192 | ||
186 | restore_irq(oldlevel); | 193 | restore_irq(oldlevel); |
187 | 194 | ||
@@ -190,18 +197,18 @@ bool gpio_enable_event(enum gpio_event_ids id) | |||
190 | 197 | ||
191 | void gpio_disable_event(enum gpio_event_ids id) | 198 | void gpio_disable_event(enum gpio_event_ids id) |
192 | { | 199 | { |
193 | const struct gpio_module_descriptor * const desc = &gpio_descs[id >> 5]; | 200 | const struct gpio_module_desc * const desc = &gpio_descs[id >> 5]; |
194 | const struct gpio_event * const event = &desc->list->events[id & 31]; | 201 | const struct gpio_event * const event = &desc->events[id & 31]; |
195 | struct gpio_map * const base = desc->base; | 202 | volatile unsigned long * const base = desc->base; |
196 | uint32_t imr; | 203 | unsigned long imr; |
197 | 204 | ||
198 | int oldlevel = disable_irq_save(); | 205 | int oldlevel = disable_irq_save(); |
199 | 206 | ||
200 | /* Remove bit from mask */ | 207 | /* Remove bit from mask */ |
201 | imr = base->imr & ~event->mask; | 208 | imr = base[IMR] & ~event->mask; |
202 | 209 | ||
203 | /* Mask the line */ | 210 | /* Mask the line */ |
204 | base->imr = imr; | 211 | base[IMR] = imr; |
205 | 212 | ||
206 | if (imr == 0) | 213 | if (imr == 0) |
207 | { | 214 | { |
diff --git a/firmware/target/arm/imx31/gpio-imx31.h b/firmware/target/arm/imx31/gpio-imx31.h index 72956d4efa..a1358672e8 100644 --- a/firmware/target/arm/imx31/gpio-imx31.h +++ b/firmware/target/arm/imx31/gpio-imx31.h | |||
@@ -42,22 +42,6 @@ enum gpio_module_number | |||
42 | GPIO_NUM_GPIO, | 42 | GPIO_NUM_GPIO, |
43 | }; | 43 | }; |
44 | 44 | ||
45 | /* Module corresponding to the event ID is identified by range */ | ||
46 | enum gpio_event_bases | ||
47 | { | ||
48 | #if (GPIO_EVENT_MASK & USE_GPIO1_EVENTS) | ||
49 | GPIO1_EVENT_FIRST = 32*GPIO1_NUM, | ||
50 | #endif | ||
51 | #if (GPIO_EVENT_MASK & USE_GPIO2_EVENTS) | ||
52 | GPIO2_EVENT_FIRST = 32*GPIO2_NUM, | ||
53 | #endif | ||
54 | #if (GPIO_EVENT_MASK & USE_GPIO3_EVENTS) | ||
55 | GPIO3_EVENT_FIRST = 32*GPIO3_NUM, | ||
56 | #endif | ||
57 | }; | ||
58 | |||
59 | #include "gpio-target.h" | ||
60 | |||
61 | /* Possible values for gpio interrupt line config */ | 45 | /* Possible values for gpio interrupt line config */ |
62 | enum gpio_int_sense_enum | 46 | enum gpio_int_sense_enum |
63 | { | 47 | { |
@@ -69,44 +53,33 @@ enum gpio_int_sense_enum | |||
69 | 53 | ||
70 | #define GPIO_SENSE_CONFIG_MASK 0x3 | 54 | #define GPIO_SENSE_CONFIG_MASK 0x3 |
71 | 55 | ||
72 | /* Register map for each module */ | ||
73 | struct gpio_map | ||
74 | { | ||
75 | volatile uint32_t dr; /* 00h */ | ||
76 | volatile uint32_t gdir; /* 04h */ | ||
77 | volatile uint32_t psr; /* 08h */ | ||
78 | union | ||
79 | { | ||
80 | struct | ||
81 | { | ||
82 | volatile uint32_t icr1; /* 0Ch */ | ||
83 | volatile uint32_t icr2; /* 10h */ | ||
84 | }; | ||
85 | volatile uint32_t icr[2]; /* 0Ch */ | ||
86 | }; | ||
87 | volatile uint32_t imr; /* 14h */ | ||
88 | volatile uint32_t isr; /* 18h */ | ||
89 | }; | ||
90 | |||
91 | /* Pending events will be called in array order which allows easy | 56 | /* Pending events will be called in array order which allows easy |
92 | * pioritization */ | 57 | * pioritization */ |
93 | 58 | ||
94 | /* Describes a single event for a pin */ | 59 | /* Describes a single event for a pin */ |
95 | struct gpio_event | 60 | struct gpio_event |
96 | { | 61 | { |
97 | uint32_t mask; /* mask: 1 << (0...31) */ | 62 | unsigned long mask; /* mask: 1 << (0...31) */ |
98 | enum gpio_int_sense_enum sense; /* Type of sense */ | 63 | enum gpio_int_sense_enum sense; /* Type of sense */ |
99 | void (*callback)(void); /* Callback function */ | 64 | void (*callback)(void); /* Callback function */ |
100 | }; | 65 | }; |
101 | 66 | ||
102 | /* Describes the events attached to a port */ | 67 | /* Module corresponding to the event ID is identified by range */ |
103 | struct gpio_event_list | 68 | enum gpio_event_bases |
104 | { | 69 | { |
105 | int ints_priority; /* Interrupt priority for this GPIO */ | 70 | #if (GPIO_EVENT_MASK & USE_GPIO1_EVENTS) |
106 | unsigned count; /* Count of events for the module */ | 71 | GPIO1_EVENT_FIRST = 32*GPIO1_NUM, |
107 | const struct gpio_event *events; /* List of events */ | 72 | #endif |
73 | #if (GPIO_EVENT_MASK & USE_GPIO2_EVENTS) | ||
74 | GPIO2_EVENT_FIRST = 32*GPIO2_NUM, | ||
75 | #endif | ||
76 | #if (GPIO_EVENT_MASK & USE_GPIO3_EVENTS) | ||
77 | GPIO3_EVENT_FIRST = 32*GPIO3_NUM, | ||
78 | #endif | ||
108 | }; | 79 | }; |
109 | 80 | ||
81 | #include "gpio-target.h" | ||
82 | |||
110 | void gpio_init(void); | 83 | void gpio_init(void); |
111 | bool gpio_enable_event(enum gpio_event_ids id); | 84 | bool gpio_enable_event(enum gpio_event_ids id); |
112 | void gpio_disable_event(enum gpio_event_ids id); | 85 | void gpio_disable_event(enum gpio_event_ids id); |
diff --git a/firmware/target/arm/imx31/mc13783-imx31.c b/firmware/target/arm/imx31/mc13783-imx31.c index 5146122327..9d8f6190a3 100644 --- a/firmware/target/arm/imx31/mc13783-imx31.c +++ b/firmware/target/arm/imx31/mc13783-imx31.c | |||
@@ -22,10 +22,11 @@ | |||
22 | #include "cpu.h" | 22 | #include "cpu.h" |
23 | #include "gpio-imx31.h" | 23 | #include "gpio-imx31.h" |
24 | #include "mc13783.h" | 24 | #include "mc13783.h" |
25 | #include "mc13783-target.h" | ||
25 | #include "debug.h" | 26 | #include "debug.h" |
26 | #include "kernel.h" | 27 | #include "kernel.h" |
27 | 28 | ||
28 | extern const struct mc13783_event_list mc13783_event_list; | 29 | extern const struct mc13783_event mc13783_events[MC13783_NUM_EVENTS]; |
29 | extern struct spi_node mc13783_spi; | 30 | extern struct spi_node mc13783_spi; |
30 | 31 | ||
31 | /* PMIC event service data */ | 32 | /* PMIC event service data */ |
@@ -107,8 +108,8 @@ static void mc13783_interrupt_thread(void) | |||
107 | * generated. */ | 108 | * generated. */ |
108 | imx31_regset32(&MC13783_GPIO_IMR, 1ul << MC13783_GPIO_LINE); | 109 | imx31_regset32(&MC13783_GPIO_IMR, 1ul << MC13783_GPIO_LINE); |
109 | 110 | ||
110 | event = mc13783_event_list.events; | 111 | event = mc13783_events; |
111 | event_last = event + mc13783_event_list.count; | 112 | event_last = event + MC13783_NUM_EVENTS; |
112 | 113 | ||
113 | /* .count is surely expected to be > 0 */ | 114 | /* .count is surely expected to be > 0 */ |
114 | do | 115 | do |
@@ -181,8 +182,7 @@ void mc13783_close(void) | |||
181 | 182 | ||
182 | bool mc13783_enable_event(enum mc13783_event_ids id) | 183 | bool mc13783_enable_event(enum mc13783_event_ids id) |
183 | { | 184 | { |
184 | const struct mc13783_event * const event = | 185 | const struct mc13783_event * const event = &mc13783_events[id]; |
185 | &mc13783_event_list.events[id]; | ||
186 | int set = event->set; | 186 | int set = event->set; |
187 | uint32_t mask = event->mask; | 187 | uint32_t mask = event->mask; |
188 | 188 | ||
@@ -198,8 +198,7 @@ bool mc13783_enable_event(enum mc13783_event_ids id) | |||
198 | 198 | ||
199 | void mc13783_disable_event(enum mc13783_event_ids id) | 199 | void mc13783_disable_event(enum mc13783_event_ids id) |
200 | { | 200 | { |
201 | const struct mc13783_event * const event = | 201 | const struct mc13783_event * const event = &mc13783_events[id]; |
202 | &mc13783_event_list.events[id]; | ||
203 | int set = event->set; | 202 | int set = event->set; |
204 | uint32_t mask = event->mask; | 203 | uint32_t mask = event->mask; |
205 | 204 | ||