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author | Dave Chapman <dave@dchapman.com> | 2007-10-27 12:14:53 +0000 |
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committer | Dave Chapman <dave@dchapman.com> | 2007-10-27 12:14:53 +0000 |
commit | d0c44f52d75ea6d2806d65bb77e8670ccefe6062 (patch) | |
tree | 74dff27535f444a590487d31bc24b803744ba889 | |
parent | 3c1d2069ddaacfc8223ac2f741ab2577f2e4ba38 (diff) | |
download | rockbox-d0c44f52d75ea6d2806d65bb77e8670ccefe6062.tar.gz rockbox-d0c44f52d75ea6d2806d65bb77e8670ccefe6062.zip |
Add support for co-processor instructions. I'm not 100% sure about this, but it seems to work...
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15334 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | utils/disassembler/arm/disasm_arm.c | 47 |
1 files changed, 45 insertions, 2 deletions
diff --git a/utils/disassembler/arm/disasm_arm.c b/utils/disassembler/arm/disasm_arm.c index 65cb9280a3..aa04ab6265 100644 --- a/utils/disassembler/arm/disasm_arm.c +++ b/utils/disassembler/arm/disasm_arm.c | |||
@@ -238,6 +238,49 @@ void opcode_stg(char *stg, ULONG val, ULONG off) | |||
238 | } | 238 | } |
239 | } | 239 | } |
240 | 240 | ||
241 | void opcode_cop(char *stg, ULONG val, ULONG off) | ||
242 | { | ||
243 | char* op; | ||
244 | int opcode1 = (val >> 21) & 0x7; | ||
245 | int CRn = (val >> 16) & 0xf; | ||
246 | int Rd = (val >> 12) & 0xf; | ||
247 | int cp_num = (val >> 8) & 0xf; | ||
248 | int opcode2 = (val >> 5) & 0x7; | ||
249 | int CRm = val & 0xf; | ||
250 | |||
251 | |||
252 | // ee073f5e mcr 15, 0, r3, cr7, cr14, {2} | ||
253 | |||
254 | if (val & (1<<4)) { | ||
255 | if (val & (1<<20)) { | ||
256 | op = "mrc"; | ||
257 | } else { | ||
258 | op = "mcr"; | ||
259 | } | ||
260 | opcode1 = (val >> 21) & 0x7; | ||
261 | CRn = (val >> 16) & 0xf; | ||
262 | Rd = (val >> 12) & 0xf; | ||
263 | cp_num = (val >> 8) & 0xf; | ||
264 | opcode2 = (val >> 5) & 0x7; | ||
265 | CRm = val & 0xf; | ||
266 | |||
267 | sprintf(stg+strlen(stg), "%s%s %d, %d, r%d, cr%d, cr%d, {%d}", op, cnd1[val>>28], cp_num, opcode1, Rd, CRn, CRm, opcode2); | ||
268 | } else { | ||
269 | op = "cdp"; | ||
270 | |||
271 | opcode1 = (val >> 20) & 0xf; | ||
272 | CRn = (val >> 16) & 0xf; | ||
273 | Rd = (val >> 12) & 0xf; | ||
274 | cp_num = (val >> 8) & 0xf; | ||
275 | opcode2 = (val >> 5) & 0x7; | ||
276 | CRm = val & 0xf; | ||
277 | |||
278 | sprintf(stg+strlen(stg), "%s%s %d, %d, cr%d, cr%d, cr%d, {%d}", op, cnd1[val>>28], cp_num, opcode1, Rd, CRn, CRm, opcode2); | ||
279 | } | ||
280 | |||
281 | } | ||
282 | |||
283 | |||
241 | void single_data(char *stg, ULONG val) | 284 | void single_data(char *stg, ULONG val) |
242 | { | 285 | { |
243 | char op2[80]; | 286 | char op2[80]; |
@@ -370,8 +413,8 @@ void dis_asm(ULONG off, ULONG val, char *stg) | |||
370 | case 10: | 413 | case 10: |
371 | case 11: branch_stg(stg, val, off); break; | 414 | case 11: branch_stg(stg, val, off); break; |
372 | case 12: | 415 | case 12: |
373 | case 13: | 416 | case 13: sprintf(stg+strlen(stg), "cop%s", cnd1[val>>28]); break; |
374 | case 14: sprintf(stg+strlen(stg), "cop%s", cnd1[val>>28]); break; | 417 | case 14: opcode_cop(stg, val, off); break; |
375 | case 15: sprintf(stg+strlen(stg), "swi%s", cnd1[val>>28]); break; | 418 | case 15: sprintf(stg+strlen(stg), "swi%s", cnd1[val>>28]); break; |
376 | } | 419 | } |
377 | } | 420 | } |